Problem 4 (10 points): Examine the difficulty of adding a proposed ss rs1, rs2, imm (Store Sum) instruction to RISC-V. Interpretation: Mem[Reg[rs1]] = Reg[rs2]+imm a) Which new functional blocks (if any) do we need for this instruction? b) Which existing functional blocks (if any) require modification? c) What new signals do we need (if any) from the control unit to support this instruction? d) Modify the figure below to demonstrate an implementation of this new instruction. (Just draw the modified part.)
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Step 1: From the explanation, the instruction requires no additional functional block — the functional block to use is "nothing", meaning the existing hardware suffices. Show more…
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1. Convert the following ARM assembly code into machine language. Write the instructions in hexadecimal -- 20 points. MOV R10, #63488 LSL R9, R7, #7 STR R4, [R11, R8] ASR R6, R7, R3 2. Consider the data-processing instructions with an immediate Src2. a. Which instructions from Problem 1 are in this format? b. Write out the 12-bit immediate field (imm12) of the instructions from part (a), then write them as 32-bit immediates.
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