Figure 1-1 47) Which edge in Figure 1-1 is the leading...

Figure 1-1 47) Which edge in Figure 1-1 is the leading edge? A) 1 B) 2 C) 3 D) Both 1 and 3 48) Which edge in Figure 1-1 is the trailing edge? A) 1 B) 2 C) 3 D) Both 1 and 3 Figure 1-2 49) Item (3) of the nonideal pulse in Figure 1-2 represents the waveform A) amplitude B) rise time C) fall time D) pulse width Figure 5-3 50) Which circuit in Figure 5-3 represents the NAND implementation of an inverter? A) Figure (A). B) Figure (B). C) Figure (C). D) Figure (D). Figure 5-4 51) Which of the figures in Figure 5-4 represents the NOR implementation of a NAND gate? A) Figure (A) B) Figure (B) C) Figure (C) D) Figure (D)

Transcript

00:01 Hello students, in this question many questions are asked and for the question number 47.

00:08 So this is the given figure that is a waveform is given and this is named as 1 and this is region is 2 and this region is 3.

00:20 So for 47th question it is asked that what is the leading edge? so leading edge means that is the start of the wave so this edge is called leading edge.

00:35 So the leading edge is represented by the number 1.

00:38 So the right option is option a, 1 is the right answer.

00:48 So in a wave this edge that is the rising portion is called leading edge and the decreasing portion, lowering portion is called trailing edge.

01:04 So the next question that is the 48th question is this only that is the what is the trailing edge? so number 3 represents the trailing edge.

01:14 So option c, 3 is the trailing edge is of the given wave and for 49th question so in a given waveform that is this type of waveform is given in this what is the number 3 represents? so number 3 represents the width of the pulse.

01:40 So that is nothing but pulse width.

01:43 So option d pulse width is the answer for question number 49 and for question number 50 so they are asking the nand implementation of nor that is nand implementation of inverter.

02:05 Inverter is nothing but nor gate.

02:08 So the diagram c so option c, figure c is the right answer for this question.

02:26 So let's see how it is.

02:29 So figure c given here is so one input gate and this is given as input so this is the circuit here.

02:46 So if we give an input a then it will be a, a.

02:52 So if we inputs are given through a nand gate means what happens a dot a to the whole bar.

03:02 So that will be equal to a dot a is nothing but a the bar will be here so this is a bar.

03:08 So a bar is nothing but the output of inverter that is here we are giving a as input and we are getting a bar as output.

03:21 So this diagram represents the nand implementation of not and for question number 51 they are asking nor implementation of nand gate.

03:37 So for this the right option is option a figure a is the right answer...

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