Chapter Questions
With rise in temperature the electrical conductivity of intrinsic semiconductor(a) increases(b) decreases(c) first increases and then decreases(d) first decreases and then increases
In an extrinsic semiconductor, the ratio of impurity atoms to that of pure atoms is(a) $1: 10^{8}$(b) $10^{8}: 1$(c) $1: 10^{6}$(d) $10^{6}: 1$
A semiconductor is known to have an electron concentration of $8 \times 10^{13}$ per $\mathrm{cm}^{3}$ and hole concentration of $5 \times$ $10^{12}$ per $\mathrm{cm}^{3}$. The semiconductor is(a) $n$ -type(b) $p$ -type(c) intrinsic(d) none of these
Fermi energy level is(a) the minimum energy of electrons at $0 \mathrm{~K}$(b) the maximum energy of electrons at $273 \mathrm{~K}$(c) the maximum energy of electrons at $0 \mathrm{~K}$(d) the minimum energy of electrons at $273 \mathrm{~K}$
At absolute zero temperature, a crystal of pure germanium(a) behaves as perfect conductor(b) behaves as perfect insulator(c) contains no electron(d) none of the above
A piece of copper and another of germanium are cooled from room temperature to $80 \mathrm{~K}$. The resistance of(a) each of them increases(b) each of them decreases(c) copper increases and germanium decreases(d) copper decreases and germanium increases
The mobility of conduction electrons is greater than that of holes since electrons(a) are lighter(b) are negatively charged(c) require smaller energy for moving through crystal lattice(d) undergo smaller number of collisions
In an $n$ -type semiconductor, the acceptor valence band is(a) above the conduction band of the host crystal(b) below the valence band of the host crystal(c) close to the conduction band of the host crystal(d) close to the valence band of the host crystal
In a $p$ -type semiconductor, the acceptor valence band is(a) above the conduction band of the host crystal(b) below the conduction band of the host crystal(c) close to the conduction band of the host crystal(d) close to the valence band of the host crystal
There is no hole current in good conductors, because they(a) are full of electron gas(b) have large forbidden gap(c) have no valence band(d) have overlapping valence and conduction bands
The conductivity of a pure semiconductor can be increased by(a) increasing temperature(b) mixing trivalent impurity(c) mixing pentavalent impurity(d) all of the above
A hole in a semiconductor(a) has zero mass(b) has mass equal to that of proton(c) has mass equal to that of positron(d) is a positively charged vacancy
In a $p$ -type semiconductor(a) major current carriers are electrons(b) major carriers are mobile negative ions(c) major carriers are mobile holes(d) the number of mobile holes exceeds the number of acceptors
The thickness of the depletion layer is of the order of(a) a micron(b) a millimetre(c) a nanometre(d) a picometre
In a semiconductor diode, the barrier potential offers opposition to only(a) majority carriers in both regions(b) minority carriers in both regions(c) free electrons in the $n$ -region(d) holes in the $p$ -region
The forbidden energy band gaps in conductors, semiconductors and insulators are $E G_{1}, E G_{2}$ and $E G_{3}$ respectively. The relation among them is(a) $E G_{1}=E G_{2}=E G_{3}$(b) $E G_{1}<E G_{2}<E G_{3}$(c) $E G_{1}>E G_{2}>E G_{3}$(d) $E G_{1}<E G_{2}>E G_{3}$
If band gap between valence and conduction band in a material is $5 \mathrm{eV}$, the material is(a) an insulator(b) good conductor(c) semiconductor(d) such materials are non-existent
In a semiconducting diode, the reverse biased current is due to drift of free electrons and holes caused by(a) thermal excitations only(b) impurity atoms only(c) both (a) and (b)(d) neither (a) nor (b)
The probability of finding an electron in Fermi energy level is(a) $100 \%$(b) $50 \%$(c) $0 \%$(d) $20 \%$
The number of minority carriers crossing the junction of a diode depends primarily on the(a) concentration of doping impurities(b) magnitude of potential barrier(c) magnitude of the forward bias voltage(d) rate of thermal generation of electron-hole pair
The electrical resistance of depletion layer is large because(a) it has no charge carriers(b) it has a large number of charge carriers(c) it contains electrons as charge carriers(d) it has holes as charge carriers
In a $p-n$ junction, there is no appreciable current if(a) $p$ -section is made positive and $n$ -section negative(b) a potential difference is applied across the junction making $p$ -section negative and $n$ -section positive(c) a potential difference is applied across the junction(d) it is impossible
A $p-n$ junction is said to be forward biased, when(a) no potential difference is applied across $p$ -and $n$ regions(b) a potential difference is applied across $p$ - and $n$ -regions making $p$ -region positive and $n$ -region negative(c) a potential difference is applied across $p$ - and $n$ -regions making $p$ -region negative and $n$ -region positive(d) a magnetic field is applied in the region of junction
In a semiconductor diode, $p$ -side is earthed and to $n$ -side is applied a potential of $-2$ volt; the diode shall(a) conduct(b) not conduct(c) conduct partially(d) break down
The $p-n$ junctions can be connected in series by three methods as shown in the following figure. If the potential difference in the junctions is the same, then the correct connections will be(a) in circuits (1) and (2)(b) in circuits ( 2 ) and (3)(c) in circuits (1) and (3)(d) only in the circuit (1)
The small currents in reverse bias condition are due to(a) electrons(b) majority charge carriers, i.e., electrons on $n$ -side and holes on $p$ -side(c) minority charge carriers, i.e., electrons on $p$ -side and holes on $n$ -side(d) temperature
In a $p-n$ junction diode, holes diffuse from $p$ -region to $n$ -region because(a) the free electrons in the $n$ -region attract them(b) they are swept across the junction by potential difference(c) there is a greater concentration of holes in $p$ -region as compared to $n$ -region(d) none of the above
The potential barrier at a $p-n$ junction is due to the charges on either side of the junction. These charges are(a) fixed donor and acceptor ions(b) minority carriers(c) majority carriers(d) both majority and minority carriers
The diode used as voltage regulator is(a) photodiode(b) light emitting diode(c) zener diode(d) $p-n$ junction diode
To measure light intensity we use(a) LED with forward bias(b) LED with reverse bias(c) photodiode with reverse bias(d) photodiode with forward bias
If the two ends $p$ and $n$ of a $p-n$ diode junction are joined by a wire(a) there will not be a steady current in the circuit(b) there will be a steady current from $n$ -side to $p$ -side(c) there will be a steady current form $p$ -side to $n$ -side(d) there may not be a current depending upon the resistance of the connecting wire
For a given circuit of ideal $p-n$ junction diode which of the following is correct?(a) In forward biasing, the voltage across $R$ is $V$(b) In reverse biasing the voltage across $R$ is $V$(c) In forward biasing the voltage across $R$ is $2 V$(d) In reverse biasing the voltage across $R$ is $2 \mathrm{~V}$
In a forward biased $p-n$ junction diode, the potential barrier in the depletion region will be of the form
The reverse saturation of $p-n$ diode(a) depends on doping concentrations(b) depends on diffusion lengths of carriers(c) depends on the doping concentrations and diffusion lengths(d) depends on the doping concentrations, diffusion length and device temperature
In a germanium crystal equal number of aluminium and arsenic atoms are added, then(a) it remains an intrinsic semicondutor(b) it becomes a n-type semiconductor(c) it becomes a $p$ -type semiconductor(d) it becomes an insulator
If the ratio of the concentration of electrons to that of holes in a semiconductor is $7 / 5$ and the ratio of currents is $7 / 4$, then what is the ratio of their drift velocities?(a) $4 / 7$(b) $5 / 8$(c) $4 / 5$(d) $5 / 4$
A light emitting diode (LED) has a voltage drop of 2 volt across it and passes a current of $10 \mathrm{~mA}$ when it operates with a 6 volt battery through a limiting resistor $R$. The value of $R$ is(a) $40 \mathrm{k} \Omega$(b) $4 \mathrm{k} \Omega$(c) $200 \Omega$(d) $400 \Omega$
In the following, which one of the diodes ins reverse biased?
If the lattice constant of this semiconductor is decreased, then which of the following is correct?(a) All $E_{e}, E_{v}, E_{y}$ decrease(b) All $E_{c}^{c}, E_{g}^{g}, E_{v}$ increase(c) $E_{c}$ and $E_{y}^{5}$ increase, but $E_{g}$ decreases(d) $E_{c}$ and $E_{v}$ decrease, $E_{g}$ increases
Regarding a semiconductor which one of the following is wrong?(a) There are no free electrons at room temperature(b) There are no free electrons at $0 \mathrm{~K}$(c) The number of free electrons increases with rise of temperature(d) The charge carriers are electrons and holes
Which of the following statements is true for an $n$ -type semiconductor?(a) The donor level lies closely below the bottom the conduction band(b) The donor level lies closely above the top of the valence band(c) The donor level lies at the halfway mark of the forbidden energy gap(d) None of the above
The number densities of electrons and holes in a pure germanium at room temperature are equal and its value is $3 \times 10^{16}$ per $\mathrm{m}^{3}$. On doping with aluminium, the hole density increases to $4.5 \times 10^{22}$ per $\mathrm{m}^{3}$. Then the electron density in doped germanium is(a) $2 \times 10^{10} \mathrm{~m}^{-3}$(b) $5 \times 10^{9} \mathrm{~m}^{-3}$(c) $4.5 \times 10^{9} \mathrm{~m}^{-3}$(d) $3 \times 10^{9} \mathrm{~m}^{-3}$
If in a $p-n$ junction diode, a square input signal of $10 \mathrm{~V}$ is applied as shown
Carbon, silicon and germanium have four valence electrons each. At room temperature which one of the following statements is most appropriate?(a) The number of free electrons for conduction is significant only in $\mathrm{Si}$ and Ge but small in $C$(b) The number of free conduction electrons is significant in $C$ but small in $\mathrm{Si}$ and $\mathrm{Ge}$(c) The number of free conduction electrons is negligibly small in all the three(d) The number of free electrons for conduction is significant in all the three
The graph given below represents the $I-V$ characteristics of a zener diode. Which part of the characteristics curve is most relevant for its operation as a voltage regulator?(a) $a b$(b) $b c$(c) $c d$(d) $d e$
In comparison to a half wave rectifier, the full wave rectifier gives lower(a) efficiency(b) average DC(c) average output voltage(d) none of these
A half-wave rectifier is being used to rectify an alternating voltage of frequency $50 \mathrm{~Hz}$. The number of pulses of rectified current obtained in one second is(a) 50(b) 25(c) 100(d) 200
A sinusoidal voltage of peak value 200 volt is connected to a diode and resistor $R$ in the circuit shown so that half wave rectification occurs. If the forward resistance of the diode is negligible compared to $R$, the rms value of voltage across $R$ is approximately(a) 200(b) 100(c)(d) 283
A sinusoidal voltage of $\mathrm{rms}$ value of 200 volt is connected to the diode and a capacitor $C$ in the circuit shown so that half wave rectification occurs. The final potential difference in volt across $C$ is(a) 500(b) 200(c) 283(d) 141
A semiconductor $X$ is made by doping a germanium crystal with arsenic $(Z=33)$ A second semiconductor $Y$ is made by doping germanium with indium $(Z=49)$ The two are joined end to end and connected to a battery as shown. Which of the following statements is correct?(a) $X$ is $p$ -type, $Y$ is $n$ -type and the junction is forward biased(b) $X$ is $n$ -type, $Y$ is $p$ -type and the junction is forward biased(c) $X$ is $p$ -type, $Y$ is $n$ -type and the junction is reverse biased(d) $X$ is $n$ -type, $Y$ is $p$ -type and the junction is reverse biased
A full wave rectifier circuit along with the output is shown in the following diagram. The contributions (s) from the diode (1) is (are)(a) $C$(b) $A, C$(c) $B, D$(d) $A, B, C, D$
Out of the common-base, common-emitter and common-collector configurations of the transistor amplifier, the voltage gain is highest in(a) common-base(b) common-collector(c) common-emitter(d) equal in all the cases
In the Q. 52 , the power gain is highest in(a) common-base(b) common-collector(c) common-emitter(d) equal in all the cases
The emitter of a transistor is doped the heaviest because it(a) acts as a supplier of charge carriers(b) dissipates maximum power(c) has a large resistance(d) has a small resistance
One way in which the operation of an $n-p-n$ transistor differs from that of a $p-n-p$(a) the emitter junction is reverse biased in $n-p-n$(b) the emitter junction injects minority carriers into base region of the $p-n-p$(c) the emitter injects holes into the base of the $p-n-p$ and electrons into the base region of $n-p-n$(d) the emitter injects holes into the base of $n-p-n$
$n-p-n$ transistors are preferred to $p-n-p$ transistors because(a) they have low cost(b) they have low dissipation energy(c) they are capable of handling large power(d) electrons have high mobility than holes and hence high mobility of energy
In common-base transistor amplifier, the phase difference between output voltage and input voltage is(a) zero(b) $180^{\circ}$(c) $90^{\circ}$(d) $45^{\circ}$
A transistor is used in common-emitter mode as an amplifier. Then(a) the base-collector junction is forward biased(b) the base-emitter junction is reverse biased(c) the input signal is connected in series with the voltage applied to the base-emitter junction(d) the input signal is connected in series with the voltage applied to the base-collector junction
An $n-p-n$ transistor circuit is arranged as shown in adjoining figure. It is(a) a common-base amplifier circuit(b) a common-emitter amplifier circuit(c) a common-collector amplifier circuit(d) none of the above
If the base and collector of a transistor are in forward bias, then it cannot be used as(a) a switch(b) an amplifier(c) an oscillator(d) all of these
When $n-p-n$ transistor is used as an amplifier then(a) electrons move from base to collector(b) electrons move from emitter to base(c) electrons move from collector to base(d) holes move from base to emitter
In a common base amplifier, the phase difference between input signal voltage and output voltage is(a) 0(b) $\frac{\pi}{2}$(c) $\frac{\pi}{4}$(d) $\pi$
Find the current through $1 \Omega$ resistance(a) $2 \mathrm{Amp}$(b) $1 \mathrm{Amp}$(c) $3 \mathrm{Amp}$(d) none of the above
The concentration of impurities in a transistor are(a) equal for the emitter, base and collector regions(b) least for the emitter region(c) largest for the emitter region(d) largest for the base region
If $\alpha$ and $\beta$ are the current gain in the $C B$ and $C E$ configurations respectively of the transistor circuit, then $(\beta-\alpha) / a \beta$(a) $\infty$(b) 1(c) 2(d) $0.5$
The current $I$ through $10 \Omega$ resistor in the circuit given below is(a) $50 \mathrm{~mA}$(b) $20 \mathrm{~mA}$(c) $40 \mathrm{~mA}$(d) $80 \mathrm{~mA}$
In the given circuit, the current through the resistor 2 $\mathrm{k} \Omega$ is(a) $2 \mathrm{~mA}$(b) $4 \mathrm{~mA}$(c) $6 \mathrm{~mA}$(d) $1 \mathrm{~mA}$
In an $n-p-n$ transistor, 108 electrons enter the emitter in $10^{-8} \mathrm{~s}$. If $1 \%$ electrons are lost in the base, the fraction of current that enters the collector and current amplification factor are respectively(a) $0.8$ and 49(b) $0.9$ and 90(c) $0.7$ and 50(d) $0.99$ and 99
The difference in the working of an amplifier and a stepup transformer is(a) amplifier also increases power which is not possible with transformer(b) amplifier decreases the power whereas the transformer increases the power(c) amplifier keeps the power constant whereas the transformer decreases the power(d) amplifier keeps the power constant whereas the transformer increases the power
The time variations of signals are given as in $A, B$ and $C$. Point out the true statement from the following(A)(B)(C)(a) $A, B$ and $C$ are analogue signals(b) $A$ and $B$ are analogue, but $C$ is digital signal(c) $A$ and $C$ are digital, but $B$ is analogue signal(d) $A$ and $C$ are analogue, but $\mathrm{b}$ is digital signal
In boolean algebra $Y=A+B$ implies that(a) output $Y$ exists when both inputs $A$ and $B$ exist(b) output $Y$ exists when either input $A$ exists or input $\mathrm{B}$ exists or both inputs $A$ and $B$ exist(c) output $Y$ exists when either inputs $A$ exists or input $B$ exists but not when both inputs $A$ and $B$ exist(d) output $Y$ exists when both inputs $A$ and $B$ exist but not when either input $A$ or $B$ exists
The combination of gates shown below yields(a) OR gate(b) NOT gate(c) XOR gate(d) NAND gate
The only function of a NOT gate is to(a) stop a signal(b) recomplement a signal(c) invert an input signal(d) act as universal gate
The output of 2 input OR gate is 0 only when its(a) both inputs are zero(b) either input is zero(c) both inputs are 1(d) either input is 1
The following truth table corresponds to the logic gate \begin{tabular}{|c|c|c|}(a) NAND(b) $\mathrm{AND}$(c) $\mathrm{XOR}$(d) OR
Which of the given gates corresponds to the truth table given below? \begin{tabular}{|c|c|c|}(a) XOR(b) OR(c) NAND(d) NOR
Truth table shown below is for(a) XOR(b) AND(c) XNOR(d) $\mathrm{OR}$
Which of the following gates will have an output of $1 ?$(a) (4)(b) (1)(c) (2)(d) (3)
Given below are four logic gate symbols. Those for OR, NOR and NAND are respectively(a) $1,4,3$(b) $4,1,2$(c) $1,3,4$(d) $4,2,1$
If the two inputs of a NAND gate are shorted, the gate is equivalent to(a) XOR(b) $\mathrm{OR}$(c) NOR(d) NOT
The following figure shows a logic gate circuit with two inputs $A$ and $B$ and the output $Y$. The voltage waveformsThe logic gate is:(a) NOR gate(b) OR gate(c) AND gate(d) NAND gate
In the boolean algebra $Y=A \cdot B$ indicates that(a) output $Y$ exists when either input $A$ exists or input $B$ exists(b) output $Y$ exists only when both inputs $A$ and $B$ exist(c) output $Y$ exists when either input $A$ exists or input $B$ exists but not when both inputs $A$ and $B$ exist(d) product of $A$ and $B$ is $Y$
Number 725 represented in decimal number system is represented in binary number system as(a) 10010101(b) 1011010101(c) 100101(d) 11100011
The following figure shows a logic gate circuit with two inputs $A$ and $B$ and output $C$. The voltage waveforms of $A, B$ and $C$ are as shown in second figure belowThe logic circuit gate is(a) OR gate(b) AND gate(c) NAND gate(d) NOR gate
The inputs and outputs for different time intervals are given below for NAND gate \begin{tabular}{|c|c|c|c|}The values taken by $P, Q, R, S$ are respectively(a) $1,1,1,0$(b) $0,1,0,1$(c) $0,1,0,0$(d) $1,0,1,1$
An AND gate is followed by a NOT gate in series. With two input; $A$ and $B$, the Boolean expression for the output $Y$ will be(a) $\overline{A+B}$(b) $\overline{A \cdot B}$(c) $A \cdot B$(d) $A+B$
Output $W$ is given by(a) $(X+Y) Z$(b) $(X-Y) Z$(c) $\bar{X} \cdot \bar{Y}+Z$(d) $(\bar{X} \cdot \bar{Y})+Z$