5.42. We wish to design the degenerated stage of Fig. 5.137 for a voltage gain of 10 with Q1 operating at the edge of saturation. Calculate the bias current and the value of RC if β = 100, IS = 5 × 10^-16 A, and VA = ∞. Calculate the input impedance of the circuit. VCC = 2.5 V, RC = 200. Figure 5.137.