d) Suppose the machine specified in (b) is pipelined so that each instruction is fetched while another instruction is executing. (You may neglect the time required to refill the pipeline during branches and at the start of program execution.) What is the average number of instructions that can be executed each second with the same clock rate?
Added by Julie C.
Step 1
Step 1: The machine specified in (b) has a clock rate of 2 GHz, which means it can execute 2 billion cycles per second. Show more…
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Assume that a pipelined processor has three categories of instructions: Branch, load/store, other. If it is a branch instruction it will take 3 clock cycles, if it is a load/ store instruction it will take 4 clock cycles and all other instructions require 6 clock cycles. A program consisting of $10 \%$ Branch instructions, $10 \%$ of load/store instructions is executed on this processor. Then the number of clock cycles required for the execution of the program is (A) $2.45$ (B) $3.61$ (C) $4.66$ (D) $5.5$
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Instruction Pipelining
5. Consider a CPU that implements two parallel fetch-decode-execute pipelines for superscalar processing. Show the performance improvement over scalar pipeline processing and no-pipeline processing, assuming the instruction cycle below: - a one clock cycle fetch - a one clock cycle decode - a two clock cycle execute and a 60 instruction sequence: a. No pipelining would require ____ clock cycles. b. A scalar pipeline would require ____ clock cycles. c. A superscalar pipeline with two parallel units would require ____ clock cycles.
Akash M.
In a 4-stage pipeline, IF - instruction fetches ID - instruction decode and fetch operands EX - Execute WB - write back ADD, SUB take one clock cycle, MUL take three clock cycles. Then for $\mathrm{ADD} \quad R_{2}, R_{1}, R_{0} R_{2} \leftarrow R_{1}+R_{0}$ MUL $R_{4}, R_{3}, R_{2} R_{4} \leftarrow R_{3} * R_{2}$ SUB $R_{6}, R_{5}, R_{4} R_{6} \leftarrow R_{5}-R_{4}$ Number of clock cycles required using operand forwarding technique are (A) 8 (B) 12 (C) 10 (D) 14
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