Given the Function F(w, x, y, z) generate this function's truth table. Next, determine the min-terms (the combination of w, x, y, and z for which the output function F is one). These combinations determine the input locations of the multiplexer which are set to one. The combinations, for which the output is zero, form the input locations of the multiplexer which are set to zero.
Write down the Verilog code for the Multiplexer depending on the inputs and outputs.