For a 16K-byte, direct-mapped cache, suppose the block size is 32 bytes. Draw a cache diagram indicating the block size, number of blocks, and address field decomposition (block offset, index, and tag bit width) assuming a 32-bit memory address.
Diagram should look like this:
Tag (10 bits)
Index (2 bits)
Block offset (4 bits)
Address (16 bits)
Block 0
Index Valid
Tag
Data
0 1 2 3
Mux
8
Hit
Data