Part 3: Thought Questions (Opts)
Q1: Explain the main differences between the top-down and bottom-up design methodologies.
Q2: The following is structured code of MUX 4 to be built by MUX 2 to find the errors in the codes and fix them:
module MUX_2_1 (input I0, I1, S, output Y);
assign Y = S ? I1 : I0;
endmodule
module MUX_4_1 (input IO, I1, I2, I3, S0, S1, output Y);
wire w0, w1;
MUX_2_1 U0 (.I0(I0), .I1(I1), .S(S0), .Y(w0));
MUX_2_1 U1 (.I0(I2), .I1(I3), .S(S0), .Y(w1));
MUX_2_1 U2 (.I0(w0), .I1(w1), .S(S1), .Y(Y));
endmodule
Q3: Write Verilog code for a 3-to-8 encoder using dataflow modeling based on the encoder to 4 using structured and modular design.