Question: Consider the following MIPS instructions: slti, sll, jr 1. For each of the instructions above, sketch a multicycle Datapath and control unit for a MIPS processor (one sketch for each instruction) showing only whatever is needed for the relative instruction. 2. Sketch a multicycle MIPS Datapath and control unit for the three instructions altogether. 3. Draw the Main Controller FSM for the three instructions. I'm not sure if this table is needed for multicycle but it here if you need it Instruction | RegWrite | RegDst | ALUSrc | Branch | MemWrite | MemtoRe | ALUOp1:0 ---|---|---|---|---|---|---|--- slti | | | | | | | sll | | | | | | | jr | | | | | | |
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However, I can explain how each instruction would be processed in a multicycle MIPS datapath. Show more…
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