Question

Refer to the attached diagram of a portion of the MIPS datapath. It shows the Instruction Register (IR), the Register File (Reg File), the Arithmetic Logic Unit (ALU), Sign Extend (SE) and the Data Memory (Data Mem). An example of a MIPS sw (store word) instruction (I format) is shown below. sw $t0, 4($a0) # Store the value of $t0 at the address in $a0, # with a displacement of 4 bytes. In order to implement an sw instruction (I format), which of the following components must be connected with busses? There must be a bus from the Data Mem output to the Reg File Data in [Select] There must be a bus from the ALU output to the Data Mem Addr In [Select] There must be a bus from the IR imm field to the SE component input [Select] There must be a bus from the Reg File B output to the Data Mem Addr In [Select] There must be a bus from the IR rs field to the Data Mem Data In [Select]

          Refer to the attached diagram of a portion of the MIPS datapath. It shows the Instruction
Register (IR), the Register File (Reg File), the Arithmetic Logic Unit (ALU), Sign Extend (SE) and
the Data Memory (Data Mem).
An example of a MIPS sw (store word) instruction (I format) is shown below.
sw	$t0, 4($a0)	# Store the value of $t0 at the address in $a0,
			# with a displacement of 4 bytes.
In order to implement an sw instruction (I format), which of the following components must
be connected with busses?
There must be a bus from the Data Mem output to the Reg File Data in
[Select]
There must be a bus from the ALU output to the Data Mem Addr In
[Select]
There must be a bus from the IR imm field to the SE component input
[Select]
There must be a bus from the Reg File B output to the Data Mem Addr In
[Select]
There must be a bus from the IR rs field to the Data Mem Data In
[Select]

Refer to the attached diagram of a portion of the MIPS datapath. It shows the Instruction
Register (IR), the Register File (Reg File), the Arithmetic Logic Unit (ALU), Sign Extend (SE) and
the Data Memory (Data Mem).
An example of a MIPS sw (store word) instruction (I format) is shown below.
sw t0, 4(a0) # Store the value of t0 at the address ina0,
# with a displacement of 4 bytes.
In order to implement an sw instruction (I format), which of the following components must
be connected with busses?
There must be a bus from the Data Mem output to the Reg File Data in
[Select]
There must be a bus from the ALU output to the Data Mem Addr In
[Select]
There must be a bus from the IR imm field to the SE component input
[Select]
There must be a bus from the Reg File B output to the Data Mem Addr In
[Select]
There must be a bus from the IR rs field to the Data Mem Data In
[Select]

Added by Brian T.

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