Text: Show Step By Step How a Machine Would Process This Hypothetical Machine Instruction Set 0001 - Load AC from Memory 0010 - Store AC to Memory 0011 - Load AC from I/O 0100 - Add to AC from Memory 0101 - Subtract AC from Memory 0110 - Store AC to I/O 0111 - Add to AC from Device 1000 - Subtract Device from AC 1001 - Subtract AC from Device 1010 - Halt Program Begin Memory at location 500 and Program Counter at 500 Memory location 870 has 12 stored Device 4 has 3 stored Hypothetical machine should do the following code: Load AC from memory 870 Subtract device 4 from AC Store from AC to device 2 Add to AC from memory 870 Store AC to memory 871 Add to AC from device 4 Subtract device 2 from AC Store from AC to memory 870 Add to AC from memory 871 Halt Program
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Simulate the execution (contents in memory and registers in hexadecimal). Both instructions and data are 16 bits long. The instruction format provides 4 bits for the opcode, and the remaining 12 bits can be directly addressed. The list of opcodes: 0x01 = Load AC from Memory 0x02 = Store AC to Memory 0x03 = Load AC from I/O (e.g. 3005: Load AC from I/O device 5) 0x05 = Add to AC from Memory 0x07 = Store AC to I/O (e.g. 7006: Store AC to I/O device 6) Memory: 200: 3005 201: 5500 202: 2501 500: 0005 501: Assume the value retrieved from device 5 is 0x2. The value in the PC is 200. 3.1. Simulate the execution: List the values in PC, AC, and IR in both fetch and execute cycles for each instruction. (6 points) 3.2. What is the value in address 501 at the end of the execution? (1 point)
Akash M.
Suppose the memory cells at addresses 00 through 05 in the machine described in Appendix C contain the following bit patterns: $$\begin{array}{cc} \text { Address } & \text { Contents } \\ 00 & 22 \\ 01 & 11 \\ 02 & 32 \\ 03 & 02 \\ 04 & \mathrm{C} 0 \\ 05 & 00 \end{array}$$ Assuming that the program counter initially contained $00,$ record the contents of the program counter, instruction register, and memory cell at address 02 at the end of each fetch phase of the machine cycle until the machine halts.
Suppose the memory cells at addresses 00 through 05 in the machine described in Appendix C contain the following bit patterns: $$\begin{array}{cc} \text { Address } & \text { Contents } \\ 00 & 12 \\ 01 & 02 \\ 02 & 32 \\ 03 & 42 \\ 04 & \mathrm{C} 0 \\ 05 & 00 \end{array}$$ When answering the following questions, assume that the machine starts with its program counter equal to 00 a. Translate the instructions that are executed into English. b. What bit pattern is in the memory cell at address 42 when the machine halts? c. What bit pattern is in the program counter when the machine halts?
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