( ): The associated sub-circuit of the critical path in the CPA circuit below is those in
light greys (or colored in red).
S1
A1 B1
G1 P1
G0:0
S2
B2
G2 P2
G1:0
A2
S3
A3 B3
G3 P3
G2:0
S4
B4
G4 P4
G3:0
A4 Cin
G0
C3 C2 C1 C0 Cout
C4 ( ): A Kogge-Stone adder suffers a drawback of maximum fanout than all the other
tree adders.
( ): A Sklansky adder suffers a drawback of maximum number of tracks than all the
other tree adders.
( ): The basic logic multiplier consists of multiple CSA rows shifted by funnel shifter
and a CPA array in the last shifted row.
( ): A carry save adder is in fact an extended full adder summing 3 inputs and then
producing 2 outputs
( ): Flash is one kind of non-volatile memories.
( ): The operation of write for a SRAM cell includes a pre-charge stage.
( ): N1 being designed much smaller than N2 is for a valid read.
bit
N1 N2 P1
A P2
N3 N4 A_b
( ): A sense amplifier is needed in a single column of SRAM cells to speed up the
response speed for reading.
( ): Twisted bitlines in an SRAM fell array can be designed to reduce coupling noise.
( ): Designed shifter registers can play the roles of RAM.