I-Mem
Add
Mux
ALU
Regs
D-Mem
Sign-Extend
Shift-Left-2
a.
200ps
70ps
20ps
90ps
90ps
250ps
15ps
10ps
b.
750ps
200ps
50ps
250ps
300ps
500ps
100ps
5ps
4.7.1 [10] <4.3> What is the clock cycle time if the only types of instructions we need to support are ALU instructions (ADD, AND, etc.)?
4.7.2 [10] <4.3> What is the clock cycle time if we only have to support LW instructions?
4.7.3 [20] <4.3> What is the clock cycle time if we must support ADD, BEQ, LW, and SW instructions?