Question

We assume that all memories are initialized by 10 and there is no branch prediction and the branch result is known in an ID state. Instruction Sequence add $t4, $zero, $zero Loop: add $t5, $t4, $t1 lw $t6, 0($t5) add $t5, $t4, $t2 sw $t6, 0($t5) addi $t4, $t4, 4 slti $t5, $t4, 4 bne $t5, $zero, Loop add $t8, $zero, $zero Regisger number $t1 $t2 $t5 $t6 $t8 Contents 1000 2000 1 1 1 1.1 Identify all data hazards in the following sequence of instructions without forwarding, when executed on the 5-stage pipelined MIPS implementation (4 points). 1.2 Identify all data hazards in the following sequence of instructions with forwarding, when executed on the 5-stage pipelined MIPS implementation (5 points). 1.3 What is the number of cycles when the above code is executing on the 5-stage pipelined MIPS implementation with forwarding and no branch prediction (6 points)? Please explain in details how you get the number of cycles 1.4 What is the number of cycles when the above code is executing on the 5-stage pipelined MIPS implementation without forwarding and always taken branch prediction (6 points)? Please explain in details how you get the number of cycles

Name: we assume that all memories are initialized by 10 and there is no branch prediction and the branch result is known in an id state instruction sequence add t4 zero zero loop add t5 t4 t1 lw t 95431
Uploaded: 2023-11-15T04:57:16-08:00
Duration: 3 min 28 s
Channel: Akash M
Description: we assume that all memories are initialized by 10 and there is no branch prediction and the branch result is known in an id state instruction sequence add t4 zero zero loop add t5 t4 t1 lw t 95431

          We assume that all memories are initialized by 10 and there is no branch prediction and the branch result is known in an ID state. 
Instruction Sequence
add $t4, $zero, $zero Loop: add $t5, $t4, $t1 lw $t6, 0($t5) add $t5, $t4, $t2 sw $t6, 0($t5) addi $t4, $t4, 4 slti $t5, $t4, 4 bne $t5, $zero, Loop add $t8, $zero, $zero Regisger number $t1 $t2 $t5 $t6 $t8 Contents 1000 2000 1 1 1 
1.1 Identify all data hazards in the following sequence of instructions without forwarding, when executed on the 5-stage pipelined MIPS implementation (4 points). 
1.2 Identify all data hazards in the following sequence of instructions with forwarding, when executed on the 5-stage pipelined MIPS implementation (5 points). 
1.3 What is the number of cycles when the above code is executing on the 5-stage pipelined MIPS implementation with forwarding and no branch prediction (6 points)? Please explain in details how you get the number of cycles 
1.4 What is the number of cycles when the above code is executing on the 5-stage pipelined MIPS implementation without forwarding and always taken branch prediction (6 points)? Please explain in details how you get the number of cycles

Added by Mark B.

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