Write the Verilog code for the 8-bit ALU (Arithmetic Logic Unit) requirement as below:
The ALU must have two 8-bit bus inputs (labeled A and B) and one 8-bit output as illustrated in Figure 1. The function of the ALU is selected using a three-bit signal F (F2, F1, FO) which selects one of eight operations in the ALU as indicated in Table 1.
F2 0
F1 0
FO 0 1 0
Output A B A+1 B+1 A+B A-B A AND B A OR B
A Bus
B Bus
0
0
F2 ALU F1 Control FO J Lines
0
1
ALU
0
1
1
1
0 0
0 1
C Bus V Output
1
1 1
0
1
Block diagram of a simple ALU.
Summary of simple ALU operations
The ALU above can be built in a straightforward manner as a combinational circuit (with three input signals A, B, F, and one output signal C).