Semiconductor Physics and Devices

Donald A. Neamen

Chapter 10

Fundamentals of the Metal–Oxide– Semiconductor Field-Effect Transistor - all with Video Answers

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Chapter Questions

Problem 1

The de charge distributions of four ideal MOS capacitors are shown in Figure $\mathrm{P} 10.1$. For each case: $(a)$ Is the semiconductor $\mathrm{n}$ or $\mathrm{p}$ type $?(b)$ Is the device biased in the accumulation, depletion, or inversion mode? ( $c$ ) Draw the energyband diagram in the semiconductor region.

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Problem 2

(a) Calculate the maximum space charge width $x_{d T}$ and the maximum space charge density $\left|Q_{s D}^{\prime}(\max )\right|$ in a MOS capacitor with a p-type silicon substrate at $T=300 \mathrm{~K}$ for doping concentrations of (i) $N_{a}=7 \times 10^{15} \mathrm{~cm}^{-3}$ and (ii) $N_{a}=3 \times 10^{16} \mathrm{~cm}^{-3}$.
(b) Repeat part ( $a$ ) for $T=350 \mathrm{~K}$.

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Problem 3

(a) Consider a MOS capacitor at $T=300 \mathrm{~K}$ with an $\mathrm{n}$ -type silicon substrate. Determine the silicon doping concentration such that $\left|Q_{S D}^{\prime}(\max )\right|=1.25 \times 10^{-8} \mathrm{C} / \mathrm{cm}^{-2}$.
( $b$ ) What is the surface potential that results in the maximum space charge width?

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Problem 4

Determine the metal-semiconductor work function difference $\phi_{m}$ in a MOS structure with p-type silicon for the case when the gate is $(a)$ aluminum,
(b) $\mathrm{n}^{-}$ polysilicon, and
(c) $\mathrm{p}^{+}$ polysilicon. Let $N_{a}=6 \times 10^{15} \mathrm{~cm}^{-3}$.

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Problem 5

The silicon impurity doping concentration in an aluminum-silicon dioxide-silicon MOS device is $N_{a}=4 \times 10^{16} \mathrm{~cm}^{-3}$. Using the parameters in Example $10.2$, determine the metal-semiconductor work function difference $\phi_{m s}$

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Problem 6

Consider a MOS capacitor with an n-type silicon substrate. A metal-semiconductor work function difference of $\phi_{m s}=-0.30 \mathrm{~V}$ is required. Determine the silicon doping concentration required to meet this specification when the gate is $(a) \mathrm{n}^{+}$ polysilicon, $(b) \mathrm{p}^{+}$ polysilicon, and $(c)$ aluminum. If a particular gate cannot meet this specification, explain why.

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Problem 7

(a) Consider the MOS capacitor described in Problem $10.5 .$ For an oxide thickness of $t_{o x}=20 \mathrm{~nm}=200 \AA$ and an oxide charge of $Q_{s s}^{\prime}=5 \times 10^{10} \mathrm{~cm}^{-2}$, calculate the flat-band voltage. $(b)$ Repeat part $(a)$ for an oxide thickness of $t_{a x}=8 \mathrm{~nm}=80 \AA$

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Problem 8

(a) Consider an $\mathrm{n}^{+}$ polysilicon-silicon dioxide-n-type silicon MOS structure. Let $N_{d}=4 \times 10^{15} \mathrm{~cm}^{-3}$. Calculate the ideal flat-band voltage for $t_{o x}=20 \mathrm{~nm}=200 \AA$.
(b) Considering the results of part ( $a$ ), determine the shift in flat-band voltage for
(i) $Q_{s s}^{\prime}=4 \times 10^{10} \mathrm{~cm}^{-2}$ and $(i i) Q_{s s}^{\prime}=10^{11} \mathrm{~cm}^{-2} \cdot(c)$ Repeat parts $(a)$ and $(b)$ for an
oxide thickness of $t_{\alpha x}=12 \mathrm{~nm}=120 \AA$

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Problem 9

Consider an aluminum gate-silicon dioxide-p-type silicon MOS structure with $t_{\mathrm{ox}}=450 \AA$. The silicon doping is $N_{a}=2 \times 10^{16} \mathrm{~cm}^{-3}$ and the flat-band voltage is $V_{F B}=-1.0 \mathrm{~V}$. Determine the fixed oxide charge $Q_{s s}^{\prime}$

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Problem 10

Consider a MOS device with a p-type silicon substrate with $N_{a}=2 \times 10^{16} \mathrm{~cm}^{-3}$. The oxide thickness is $t_{\alpha x}=15 \mathrm{~nm}=150 \AA$ and the equivalent oxide charge is $Q_{s s}^{\prime}=7 \times 10^{10} \mathrm{~cm}^{-2} .$ Calculate the threshold voltage for $(a)$ an $\mathrm{n}^{+}$ polysilicon gate,
(b) a p polysilicon gate, and ( $c$ ) an aluminum gate.

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Problem 11

Repeat Problem $10.10$ for an n-type silicon substrate with a doping of $N_{d}=3 \times 10^{15} \mathrm{~cm}^{-3} .$

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Problem 12

A $400-$ Å oxide is grown on $\mathrm{p}$ -type silicon with $N_{a}=5 \times 10^{15} \mathrm{~cm}^{-3}$. The flat-band voltage is $-0.9 \mathrm{~V}$. Calculate the surface potential at the threshold inversion point as well as the threshold voltage assuming negligible oxide charge. Also find the maximum space charge width for this device.

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Problem 13

A MOS device with an aluminum gate is fabricated on a p-type silicon substrate. The oxide thickness is $t_{a x}=22 \mathrm{~nm}=220 \AA$ and the trapped oxide charge is $Q_{s s}^{\prime}=4 \times 10^{10} \mathrm{~cm}^{-2}$. The measured threshold voltage is $V_{T}=+0.45 \mathrm{~V}$. Determine the p-type doping concentration.

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Problem 14

Consider a MOS device with the following parameters: $\mathrm{p}^{+}$ polysilicon gate, n-type silicon substrate, $t_{\alpha x}=18 \mathrm{~nm}=180 \AA$, and $Q_{x s}^{\prime}=4 \times 10^{10} \mathrm{~cm}^{-2}$. Determine the silicon doping concentration such that the threshold voltage is in the range $-0.35 \leq V_{T P} \leq-0.25 \mathrm{~V}$

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Problem 15

Repeat Problem $10.13$ for an $\mathrm{n}$ -type silicon substrate if the measured threshold voltage is $V_{T}=-0.975 \mathrm{~V}$. Determine the $\mathrm{n}$ -type doping concentration.

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Problem 16

An $\mathrm{n}^{+}$ polysilicon gate-silicon dioxide-silicon MOS capacitor has an oxide thickness of $t_{\alpha x}=18 \mathrm{~nm}=180 \AA$ and a doping of $N_{a}=10^{15} \mathrm{~cm}^{-3}$. The oxide charge density is
$Q_{s s}^{\prime}=6 \times 10^{10} \mathrm{~cm}^{-2} .$ Calculate the $(a)$ flat-band voltage and $(b)$ threshold voltage.

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Problem 17

An n-channel depletion mode MOSFET with an $\mathrm{n}^{+}$ polysilicon gate is shown in Figure $10.41$. The $\mathrm{n}$ -channel doping is $N_{d}=10^{15} \mathrm{~cm}^{-3}$ and the oxide thickness is $t_{\mathrm{ox}}=500 \AA$. The equivalent fixed oxide charge is $Q_{s s}^{\prime}=10^{10} \mathrm{~cm}^{-2} .$ The $\mathrm{n}$ -channel thickness $t_{c}$ is equal to the maximum induced space charge width. (Disregard the space charge region at the n-channel-p-substrate junction.) ( $a$ ) Determine the channel thickness $t_{c}$ and $(b)$ calculate the threshold voltage.

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Problem 18

Consider a MOS capacitor with an $\mathrm{n}^{+}$ polysilicon gate and $\mathrm{n}$ -type silicon substrate. Assume $N_{a}=10^{16} \mathrm{~cm}^{-3}$ and let $E_{F}-E_{c}=0.2 \mathrm{eV}$ in the $\mathrm{n}^{+}$ polysilicon. Assume the oxide has a thickness of $t_{0 x}=300 \AA$. Also assume that $\chi^{\prime}$ (polysilicon) $=\chi^{\prime}$ (singlecrystal silicon). ( $a$ ) Sketch the energy-band diagrams (i) for $V_{G}=0$ and (ii) at flat band.
(b) Calculate the metal-semiconductor work function difference. $(c)$ Calculate the threshold voltage for the ideal case of zero fixed oxide charge and zero interface states.

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Problem 19

The threshold voltage of an n-channel MOSFET is given by Equation (10.31a). Plot $V_{T}$ versus temperature over the range $200 \leq T \leq 450 \mathrm{~K}$. Consider both an aluminum gate and an $\mathrm{n}^{+}$ polysilicon gate. Assume the work functions are independent of temperature and use device parameters similar to those in Example $10.4$.

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Problem 20

Plot the threshold voltage of an $\mathrm{n}$ -channel MOSFET versus p-type substrate doping concentration similar to Figure 10.21. Consider both $\mathrm{n}^{+}$ and $\mathrm{p}^{+}$ polysilicon gates. Use reasonable device parameters.

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Problem 21

Plot the threshold voltage of a p-channel MOSFET versus n-type substrate doping concentration similar to Figure $10.22$. Consider both $\mathrm{n}^{+}$ and $\mathrm{p}^{+}$ polysilicon gates. Use reasonable device parameters.

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Problem 22

Consider an NMOS device with the parameters given in Problem 10.12. Plot $V_{T}$ versus $t_{\text {ox }}$ over the range $20 \leq t_{\mathrm{ox}} \leq 500 \mathrm{~A}$.

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Problem 23

An ideal MOS capacitor with an $\mathrm{n}^{+}$ polysilicon gate has a silicon dioxide thickness of $t_{a x}=12 \mathrm{~nm}=120 \AA$ on a p-type silicon substrate doped at $N_{a}=10^{16} \mathrm{~cm}^{-3}$. Determine the capacitance $C_{a x}, C_{F B}^{\prime}, C_{m i n}^{\prime}$, and $C^{\prime}($ inv $)$ at $(a) f=1 \mathrm{~Hz}$ and $(b) f=1 \mathrm{MHz}$.
(c) Determine $V_{F B}$ and $V_{T} .(d)$ Sketch $C^{\prime} / C_{a x}$ versus $V_{G}$ for parts $(a)$ and $(b)$.

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Problem 24

Repeat Problem $10.23$ for an ideal MOS capacitor with a $\mathrm{p}^{+}$ polysilicon gate and an n-type silicon substrate doped at $N_{d}=5 \times 10^{14} \mathrm{~cm}^{-3}$.

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Problem 25

Using superposition, show that the shift in the flat-band voltage due to a fixed charge distribution $\rho(x)$ in the oxide is given by
$$
\Delta V_{F B}=-\frac{1}{C_{\mathrm{ox}}} \int_{0}^{\mathrm{t}} \frac{x \rho(x)}{t_{\mathrm{ox}}} d x
$$

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Problem 26

Using the results of Problem $10.25$, calculate the shift in flat-band voltage for $t_{\alpha x}=20 \mathrm{~nm}=200 \AA$ for the following oxide charge distributions:
(a) $Q_{s x}^{\prime}=8 \times 10^{10} \mathrm{~cm}^{-2}$ is entirely located at the oxide-semiconductor interface,
(b) $Q_{s s}^{\prime}=8 \times 10^{10} \mathrm{~cm}^{-2}$ is uniformly distributed throughout the oxide, and
(c) $Q_{s s}^{\prime}=8 \times 10^{10} \mathrm{~cm}^{-2}$ forms a triangular distribution with the peak at the oxidesemiconductor interface and is zero at the metal-oxide interface.

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Problem 27

An ideal MOS capacitor is fabricated by using intrinsic silicon and an $\mathrm{n}^{+}$ polysilicon gate. ( $a$ ) Sketch the energy-band diagram through the MOS structure under flat-band conditions. ( $b$ ) Sketch the low-frequency $C-V$ characteristics from negative to positive gate voltage.

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Problem 28

Consider a MOS capacitor with a p-type substrate. Assume that donor-type interface traps exist only at midgap (i.e., at $\left.E_{F i}\right)$. Sketch the high-frequency $C-V$ curve from accumulation to inversion. Compare this sketch to the ideal $C-V$ plot.

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Problem 29

Consider an SOS capacitor as shown in Figure $\mathrm{P} 10.29 .$ Assume the $\mathrm{SiO}_{2}$ is ideal (no trapped charge) and has a thickness of $t_{\mathrm{ax}}=500 \AA$. The doping concentrations are $N_{d}=10^{16} \mathrm{~cm}^{-3}$ and $N_{a}=10^{16} \mathrm{~cm}^{-3} \cdot$ (a) Sketch the energy-band diagram through the device for $(i)$ flat band, (ii) $V_{G}=+3 \mathrm{~V}$, and $($ iii $) V_{G}=-3 \mathrm{~V}$.
(b) Calculate the flat-band voltage.
(c) Estimate the voltage across the oxide for
(i) $V_{G}=+3 \mathrm{~V}$ and
(ii) $V_{G}=-3 \mathrm{~V}$.
(d) Sketch the high-frequency $C-V$ characteristic curve.

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Problem 30

The high-frequency $C-V$ characteristic curve of a MOS capacitor is shown in Figure $\mathrm{P} 10.30 .$ The area of the device is $2 \times 10^{-3} \mathrm{~cm}^{2}$. The metal-semiconductor work function difference is $\phi_{m u}=-0.50 \mathrm{~V}$, the oxide is $\mathrm{SiO}_{2}$, the semiconductor is silicon, and the semiconductor doping concentration is $2 \times 10^{16} \mathrm{~cm}^{-3}$. (a) Is the semiconductor $\mathrm{n}$ or $\mathrm{p}$ type? $(b)$ What is the oxide thickness? $(c)$ What is the equivalent trapped oxide charge density? $(d)$ Determine the flat-band capacitance.

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Problem 31

Consider the high-frequency $C-V$ plot shown in Figure P10.31. ( $a$ ) Indicate which points correspond to flat-band, inversion, accumulation, threshold, and depletion modes. (b) Sketch the energy-band diagram in the semiconductor for each condition.

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Problem 32

An expression that includes the inversion charge density is given by Equation (10.59). Consider the definition of threshold voltage and show that the inversion charge density goes to zero at the drain terminal at saturation. (Hint: Let $V_{x}=V_{D S}=V_{D S}($ sat $\left.) .\right)$

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Problem 33

Consider an n-channel MOSFET with the following parameters: $k_{n}^{\prime}=0.18 \mathrm{~mA} / \mathrm{V}^{2}$, $W / L=8$, and $V_{T}=0.4 \mathrm{~V}$. Determine the drain current $I_{D}$ for (a) $V_{G S}=0.8 \mathrm{~V}$,
(c) $V_{G S}=0.8 \mathrm{~V}, V_{D S}=2.5 \mathrm{~V} ;$ and
$V_{D S}=0.2 \mathrm{~V} ;(b) V_{G S}=0.8 \mathrm{~V}, V_{D S}=1.2 \mathrm{~V}$
(d) $V_{G S}=1.2 \mathrm{~V}, V_{D S}=2.5 \mathrm{~V}$.

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Problem 34

A p-channel MOSFET has the following parameters: $k_{p}^{\prime}=0.10 \mathrm{~mA} / \mathrm{V}^{2}, W / L=15$, and $V_{T}=-0.4 \mathrm{~V}$. Calculate the drain current $I_{D}$ for $(a) V_{S G}=0.8 \mathrm{~V}, V_{S D}=0.25 \mathrm{~V} ;(b) V_{S G}=$
$0.8 \mathrm{~V}, V_{S D}=1.0 \mathrm{~V} ;(c) V_{S G}=1.2 \mathrm{~V}, V_{S D}=1.0 \mathrm{~V} ;$ and $(d) V_{S G}=1.2 \mathrm{~V}, V_{S D}=2.0 \mathrm{~V}$

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Problem 35

The parameters of an $\mathrm{n}$ -channel MOSFET are $k_{n}^{\prime}=0.6 \mathrm{~mA} / \mathrm{V}^{2}$ and $V_{T}=0.8 \mathrm{~V}$. The drain current is $1 \mathrm{~mA}$ with applied voltages of $V_{G S}=1.4 \mathrm{~V}, V_{S B}=0$, and $V_{D S}=4 \mathrm{~V}$
(a) What is the $W / L$ value?
(b) What is the value of $I_{D}$ for $V_{G S}=1.85 \mathrm{~V}, V_{S B}=0$, and $V_{D S}=6 \mathrm{~V} ?(c)$ Determine the value of $I_{D}$ for $V_{G S}=1.2 \mathrm{~V}, V_{S B}=0$, and $V_{D S}=0.15 \mathrm{~V}$

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Problem 36

Consider a p-channel MOSFET with the following parameters: $k_{p}^{\prime}=0.12 \mathrm{~mA} / \mathrm{V}^{2}$ and $W / L=20$. The drain current is $100 \mu$ A with applied voltages of $V_{S G}=0$, $V_{B S}=0$, and $V_{S D}=1.0 \mathrm{~V} .(a)$ Determine the $V_{T}$ value. $(b)$ Determine the drain current $I_{D}$ for $V_{S G}=0.4 \mathrm{~V}, V_{S B}=0$, and $V_{S D}=1.5 \mathrm{~V} .(c)$ What is the value of $I_{D}$ for $V_{S G}=0.6 \mathrm{~V}, V_{S B}=0$, and $V_{S D}=0.15 \mathrm{~V} ?$

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Problem 37

An ideal n-channel MOSFET has the following parameters: $V_{T}=0.45 \mathrm{~V}$, $\mu_{n}=425 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}, t_{\text {ox }}=11 \mathrm{~nm}=110 \AA$ A, $W=20 \mu \mathrm{m}$, and $L=1.2 \mu \mathrm{m} .$ (a) Plot $I_{D}$
versus $V_{D S}$ for $0 \leq V_{D S} \leq 3 \mathrm{~V}$ and for $V_{G S}=0,0.6,1.2,1.8$, and $2.4 \mathrm{~V} .$ Indicate on each curve the $V_{D S}(s a t)$ point. (b) Plot $\sqrt{I_{D}(s a t)}$ versus $V_{G S}$ for $0 \leq V_{G S} \leq 2.4 \mathrm{~V}$.
(c) Plot $I_{D}$ versus $V_{G S}$ for $0 \leq V_{G S} \leq 2.4 \mathrm{~V}$ and for $V_{D S}=0.1 \mathrm{~V}$.

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Problem 38

Consider an ideal p-channel MOSFET with the following parameters: $V_{T}=-0.35 \mathrm{~V}$, $\mu_{p}=210 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}, t_{\text {ox }}=11 \mathrm{~nm}=110 \AA, W=35 \mu \mathrm{m}$, and $L=1.2 \mu \mathrm{m} .\left(\right.$ a) Plot $I_{D}$
versus $V_{S D}$ for $0 \leq V_{S D} \leq 3 \mathrm{~V}$ and for $V_{S G}=0,0.6,1.2,1.8$, and $2.4 \mathrm{~V}$. Indicate on each curve the $V_{s D}(s a t)$ point.
(b) Plot $\sqrt{I_{D}(\text { sat })}$ versus $V_{s G}$ for $0 \leq V_{S G} \leq 2.4 \mathrm{~V}$.
(c) Plot $I_{D}$ versus $V_{s c}$ for $0 \leq V_{s G} \leq 2.4 \mathrm{~V}$ and for $V_{S D}=0.1 \mathrm{~V}$.

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Problem 39

Consider an n-channel MOSFET with the same parameters as described in Problem $10.37$ except that $V_{T}=-0.8 \mathrm{~V} .(a)$ Plot $I_{D}$ versus $V_{D S}$ for $0 \leq V_{D S} \leq 3 \mathrm{~V}$ and for $V_{C S}=-0.8$, $0,+0.8$, and $+1.6 \mathrm{~V}$
(b) Plot $\sqrt{I_{D}(s a t)}$ versus $V_{\sigma \text { for }}-0.8 \leq V_{G S} \leq 1.6 \mathrm{~V}$.

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Problem 40

Consider an n-channel enhancement mode MOSFET biased as shown in Figure $\mathrm{P} 10.40 .$ Sketch the current-voltage characteristics, $I_{D}$ versus $V_{D S}$, for
(a) $V_{G D}=0$, (b) $V_{G D}=V_{T} / 2$, and
(c) $V_{G D}=2 V_{T}$.

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Problem 41

Figure $\mathrm{P} 10.41$ shows the cross section of an NMOS device that includes source and drain resistances. These resistances take into account the bulk $n^{+}$ semiconductor resistance and the ohmic contact resistance. The current-voltage relations can be generated by replacing $V_{G S}$ by $V_{G}-I_{D} R_{S}$ and $V_{D S}$ by $V_{D}-I_{D}\left(R_{S}+R_{D}\right)$ in the ideal equations. Assume transistor parameters of $V_{T}=1 \mathrm{~V}$ and $K_{n}=1 \mathrm{~mA} / \mathrm{V}^{2} .(a)$ Plot the following curves on the same graph: $I_{D}$ versus $V_{D}$ for $V_{G}=2 \mathrm{~V}$ and $V_{G}=3 \mathrm{~V}$ over the range $0 \leq V_{D} \leq 5 \mathrm{~V}$ for $(i) R_{S}=R_{D}=0$ and $(i i) R_{S}=R_{D}=1 \mathrm{k} \Omega$.
(b) Plot the following curves on the same graph: $\sqrt{I_{D}}$ versus $V_{G}$ for $V_{D}=0.1 \mathrm{~V}$ and $V_{D}=5 \mathrm{~V}$ over the range $0 \leq I_{D} \leq 1 \mathrm{~mA}$ for $(i) R_{S}=R_{D}=0$ and $(i i) R_{S}=R_{D}=1 \mathrm{k} \Omega$

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Problem 42

An n-channel MOSFET has the same parameters as given in Problem $10.37$. The gate terminal is connected to the drain terminal. Plot $I_{D}$ versus $V_{D S}$ for $0 \leq V_{D S} \leq$ $5 \mathrm{~V}$. Determine the range of $V_{D S}$ over which the transistor is biased in the nonsaturation and saturation regions.

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Problem 43

The channel conductance for a p-channel MOSFET is defined as
$$
g_{d}=\left.\frac{\partial I_{D}}{\partial V_{S D}}\right|_{v_{s o-\infty}}
$$\begin{array}{l}
\text { Plot the channel conductance for the p-channel MOSFET described in }\\
\text { Problem } 10.38 \text { for } 0 \leq V_{s G} \leq 2.4
\end{array}

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Problem 44

The transconductance of an $\mathrm{n}$ -channel MOSFET is found to be $g_{m}=\partial I_{D} / \partial V_{G S}=$ $1.25 \mathrm{~mA} / \mathrm{V}$ when measured at $V_{D S}=50 \mathrm{mV}$. The threshold voltage is $V_{T}=0.3 \mathrm{~V}$.
(a) Determine the conductance parameter $K_{n} .(b)$ What is the current at $V_{G S}=0.8 \mathrm{~V}$ and $V_{D S}=50 \mathrm{mV} ?(c)$ Determine the current at $V_{G S}=0.8 \mathrm{~V}$ and $V_{D S}=1.5 \mathrm{~V}$.

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Problem 45

The experimental characteristics of an ideal $\mathrm{n}$ -channel MOSFET biased in the saturation region are shown in Figure P10.45. If $W / L=10$ and $t_{\mathrm{ax}}=425 \AA$, determine $V_{\tau}$ and $\mu_{n}$.

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Problem 46

One curve of an n-channel MOSFET is characterized by the following parameters:
$I_{D}(\mathrm{sat})=2 \times 10^{-4} \mathrm{~A}, V_{D S}(\mathrm{sat})=4 \mathrm{~V}$, and $V_{T}=0.8 \mathrm{~V}$
(a) What is the gate voltage?
(b) What is the value of the conduction parameter?
(c) If $V_{G}=2 \mathrm{~V}$ and $V_{D S}=2 \mathrm{~V}$, determine $I_{D}$.
(d) If $V_{G}=3 \mathrm{~V}$ and $V_{D S}=1 \mathrm{~V}$, determine $I_{D}$.
(e) For each of the conditions given in $(c)$ and $(d)$, sketch the inversion charge density and depletion region through the channel.

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Problem 47

(a) An ideal n-channel MOSFET has parameters $t_{e x}=18 \mathrm{~nm}=180 \AA$, $\mu_{n}=450 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}$, and $V_{\tau}=0.4 \mathrm{~V}$. The measured current in the saturation region is $I_{D}(s a t)=0.8 \mathrm{~mA}$ when biased at $V_{G S}=2.0 \mathrm{~V}$. Determine the $(i)$ process conduction parameter and
(ii) width-to-length ratio. ( $b$ ) An ideal p-channel MOSFET has the same oxide thickness as given in part $(a)$, a mobility of $\mu_{p}=210 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}$, and a threshold voltage of $V_{T}=-0.4 \mathrm{~V}$. The measured current in the saturation region is also $I_{D}(s a t)=0.8 \mathrm{~mA}$ when biased at $V_{S G}=2.0 \mathrm{~V}$. Determine the $(i)$ process conduction parameter and (ii) width-to-length ratio.

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Problem 48

Consider the n-channel MOSFET described in Problem 10.37. (a) Calculate $g_{m L}$ for $V_{D S}=0.10 \mathrm{~V} .(b)$ Find $g_{m s}$ for $V_{G S}=1.5 \mathrm{~V} .$

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Problem 49

Consider the p-channel MOSFET described in Problem $10.38 .(a)$ Calculate $g_{m L}$ for $V_{S D}=0.10 \mathrm{~V} .(b)$ Find $g_{\text {ms }}$ for $V_{S G}=1.5 \mathrm{~V}$.

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Problem 50

An n-channel MOSFET has the following parameters: $N_{a}=5 \times 10^{16} \mathrm{~cm}^{-3}$, $t_{a x}=15 \mathrm{~nm}=150 \AA, \mu_{n}=450 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}, V_{F B}=-0.5 \mathrm{~V}, L=1.2 \mu \mathrm{m}$, and $W=8 \mu \mathrm{m}$
(a) Determine the body-effect coefficient. (b) Plot $\sqrt{I_{D}(s a t)}$ versus $V_{G s}$ over the range $0 \leq I_{D} \leq 0.5 \mathrm{~mA}$ for source-to-body voltages of $(i) V_{S B}=0,($ ii $) V_{S B}=1 \mathrm{~V}$,
(iii) $V_{S B}=2 \mathrm{~V}$, and $(i v) V_{S B}=4 \mathrm{~V} .(c)$ What are the threshold voltages for the conditions given in part $(b) ?$

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Problem 51

The substrate doping and body-effect coefficient of an $\mathrm{n}$ -channel MOSFET are $N_{a}=10^{16} \mathrm{~cm}^{-3}$ and $\gamma=0.12 \mathrm{~V}^{1 / 2}$, respectively. The threshold voltage is found to be $V_{T}=0.5 \mathrm{~V}$ when biased at $V_{S B}=2.5 \mathrm{~V}$. What is the threshold voltage at $V_{S B}=0 ?$

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Problem 52

A p-channel MOSFET has an oxide thickness of $t_{\alpha x}=20 \mathrm{~nm}=200 \AA$ and a substrate doping of $N_{d}=5 \times 10^{15} \mathrm{~cm}^{-3}$. (a) Find the body-effect coefficient.
(b) Determine the body-to-source voltage, $V_{B S}$, such that the shift in threshold voltage, $\Delta V_{T}$, from the $V_{B S}=0$ curve is $\Delta V_{T}=-0.22 \mathrm{~V}$.

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Problem 53

An NMOS device has the following parameters: $\mathrm{n}^{+}$ poly gate, $t_{\mathrm{ox}}=400 \AA, N_{a}=$ $10^{15} \mathrm{~cm}^{-3}$, and $Q_{s s}^{\prime}=5 \times 10^{10} \mathrm{~cm}^{-2} .(a)$ Determine $V_{T} .(b)$ Is it possible to apply a
$V_{S B}$ voltage such that $V_{T}=0 ?$ If so, what is the value of $V_{S B}$ ?

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Problem 54

Investigate the threshold voltage shift due to substrate bias. The threshold shift is given by Equation ( $10.81$ ). Plot $\Delta V_{T}$ versus $V_{S B}$ over the range $0 \leq V_{S B} \leq 5 \mathrm{~V}$ for several values of $N_{a}$ and $t_{\mathrm{ox}}$. Determine the conditions for which $\Delta V_{T}$ is limited to a maximum value of $0.7 \mathrm{~V}$ over the range of $V_{\mathrm{SB}}$

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Numerade Educator

Problem 55

Consider an ideal n-channel MOSFET with a width-to-length ratio of $(W / L)=10$, an electron mobility of $\mu_{n}=400 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}$, an oxide thickness of $t_{\mathrm{ox}}=475 \AA \mathrm{A}$, and a threshold voltage of $V_{T}=+0.65 \mathrm{~V}$. $(a)$ Determine the maximum value of source resistance so that the saturation transconductance $g_{m s}$ is reduced by no more than 20 percent from its ideal value when $V_{G}=5 \mathrm{~V} .(b)$ Using the value of $r_{j}$ calculated in part $(a)$, how much is $g_{\text {ms }}$ reduced from its ideal value when $V_{G S}=3 \mathrm{~V}$ ?

Chai Santi

Numerade Educator

Problem 56

An n-channel MOSFET has the following parameters:
$$
\begin{aligned}
\mu_{n} &=400 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s} & t_{\mathrm{ox}} &=500 \AA \\
L &=2 \mu \mathrm{m} & & W=20 \mu \mathrm{m} \\
V_{T} &=+0.75 \mathrm{~V} & &
\end{aligned}
$$Assume the transistor is biased in the saturation region at $V_{G S}=4 \mathrm{~V} .(a)$ Calculate the ideal cutoff frequency. (b) Assume that the gate oxide overlaps both the source and drain contacts by $0.75 \mu \mathrm{m}$. If a load resistance of $R_{L}=10 \mathrm{k} \Omega$ is connected to the output, calculate the cutoff frequency. Repeat Problem $10.56$ for the case when the electrons are traveling at a saturation velocity of $v_{\text {sat }}=4 \times 10^{6} \mathrm{~cm} / \mathrm{s}$.

Chai Santi

Numerade Educator

Problem 57

Repeat Problem $10.56$ for the case when the electrons are traveling at a saturation velocity of $v_{\text {st }}=4 \times 10^{6} \mathrm{~cm} / \mathrm{s}$.

Chai Santi

Numerade Educator

Problem 58

Design an ideal silicon n-channel MOSFET with a polysilicon gate to have a threshold voltage of $V_{T}=0.65 \mathrm{~V}$. Assume an oxide thickness of $t_{\mathrm{ox}}=300 \AA \mathrm{A}$, channel length of $L=1.25 \mu \mathrm{m}$, and a nominal value of $Q_{x}^{\prime}=1.5 \times 10^{11} \mathrm{~cm}^{-2}$. It is desired to have a drain current of $I_{D}=50 \mu \mathrm{A}$ at $V_{G S}=2.5 \mathrm{~V}$ and $V_{D S}=0.1 \mathrm{~V}$. Determine the substrate doping concentration, channel width, and type of gate required.

Chai Santi

Numerade Educator

Problem 59

Design an ideal silicon n-channel depletion mode MOSFET with a polysilicon gate to have a threshold voltage of $V_{T}=-0.65 \mathrm{~V}$. Assume an oxide thickness of $t_{0 x}=300 \AA$, a channel length of $L=1.25 \mu \mathrm{m}$, and a nominal value of $Q_{s s}^{\prime}=1.5 \times 10^{11} \mathrm{~cm}^{-2} .$ It is desired to have a drain current of $I_{D}(\mathrm{sat})=50 \mu \mathrm{A}$ at
$V_{G S}=0 .$ Determine the type of gate, substrate doping concentration, and channel width required.

Chai Santi

Numerade Educator

Problem 60

Consider the CMOS inverter circuit shown in Figure 10.59a. Ideal $\mathrm{n}$ - and p-channel devices are to be designed with channel lengths of $L=2.5 \mu \mathrm{m}$ and oxide thicknesses of $t_{\mathrm{ox}}=450 \AA$. Assume the inversion channel mobilities are one-half the bulk values. The threshold voltages of the $\mathrm{n}$ - and $\mathrm{p}$ -channel transistors are to be $+0.5 \mathrm{~V}$ and $-0.5 \mathrm{~V}$, respectively. The drain current is to be $I_{D}=0.256 \mathrm{~mA}$ when the input voltage to the inverter is $1.5 \mathrm{~V}$ and $3.5 \mathrm{~V}$ with $V_{D D}=5 \mathrm{~V}$. The gate material is to be the same in each device. Determine the type of gate, substrate doping concentrations, and channel widths.

Chai Santi

Numerade Educator

Problem 61

A complementary pair of ideal n-channel and p-channel MOSFETs is to be designed to produce the same $I-V$ characteristics when they are equivalently biased. The devices are to have the same oxide thickness of $250 \AA$ and the same channel length of $L=2 \mu \mathrm{m} .$ Assume the $\mathrm{SiO}_{2}$ layer is ideal. The $\mathrm{n}$ -channel device is to have a channel width of $W=20 \mu \mathrm{m}$. Assume constant inversion layer mobilities of $\mu_{n}=600 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s}$ and $\mu_{p}=220 \mathrm{~cm}^{2} / \mathrm{V}-\mathrm{s} .(a)$ Determine $\mathrm{p}$ -type and $\mathrm{n}$ -type sub-
strate doping concentrations. ( $b$ ) What are the threshold voltages? ( $c$ ) What is the width of the p-channel device?

Chai Santi

Numerade Educator