A NOT gate is implemented using an $n$-channel enhancement-mode MOSFET as shown in Figure P11.20 with $V_{D D}=5 \mathrm{~V}, V_T=0.9 \mathrm{~V}$, and $R_L=1 \mathrm{k} \Omega$.
(a) If $V_{\text {in }}=5 \mathrm{~V}$, and $r_{o n}=100 \Omega$; calculate $V_{\text {oul }}$.
(b) Find $R_L$ if $V_{\text {out }}=0.1 \mathrm{~V}$.
Figure P11.20 can't copy