• Home
  • Textbooks
  • Essentials of Electrical and Computer Engineering
  • Transistor Fundamentals: Switches, Large-Signal Amplifiers, and Power Electronics

Essentials of Electrical and Computer Engineering

David V. Kerns, Jr., J. David Irwin

Chapter 11

Transistor Fundamentals: Switches, Large-Signal Amplifiers, and Power Electronics - all with Video Answers

Educators

Chapter Questions

00:47

Problem 1

What is the function of a transistor in:
(a) a digital circuit?
(b) an analog circuit?

Hunza Gilgit
Hunza Gilgit
Numerade Educator
00:47

Problem 2

What are the two basic types of transistors?

Hunza Gilgit
Hunza Gilgit
Numerade Educator

Problem 3

What type transistor functions most closely as
(a) a voltage-controlled current source?
(b) a current-controlled current source?

Check back soon!

Problem 4

Define a small-signal amplifier and a large-signal amplifier and highlight the important differences between them.

Check back soon!

Problem 5

A digital switching circuit is most closely related to what type of amplifier?

Check back soon!
01:00

Problem 6

Identify the device structures shown in Figure P11.6 as $n$-channel enhancement-mode, $n$-channel depletion-mode, $p$-channel enhancement-mode, $p$-channel depletion-mode, or none of the above.
Figure P11.6 can't copy

Chai Santi
Chai Santi
Numerade Educator
02:25

Problem 7

Match each characteristic, listed (a) through (n), with the appropriate structure(s), listed I through V. More than one structure may apply to each.
(a) conducts when $V_{G S}$ is positive
(b) hole current flows when transistor is $\mathrm{ON}$
(c) electron current flows when transistor is $\mathrm{ON}$
(d) conducts when $V_{G S}=0$
(e) conducts when $V_{G S}$ is negative
(f) turns OFF through the repulsion of electrons
(g) turns OFF through the repulsion of holes
(h) conducting channel formed during fabrication
(i) conducting channel formed by biasing the gate
(j) turns ON through the attraction of electrons
(k) turns $\mathrm{ON}$ through the attraction of holes
(l) the body is p-type
(m) the body is n-type
(n) the body is furry
I. $n$-channel enhancement
II. $n$-channel depletion
III. $p$-channel enhancement
IV. $p$-channel depletion
V. cat

Chai Santi
Chai Santi
Numerade Educator

Problem 8

Sketch the cross-section of a $p$-channel enhancement-mode transistor and label the source, drain, gate, and substrate contacts.

Check back soon!

Problem 9

Sketch the cross-section and two common symbols for an $n$-channel enhancement-mode MOSFET.

Check back soon!

Problem 10

For an enhancement-mode MOSFET, the gate-to-source voltage must be increased in magnitude above a critical value to initiate current conduction from source-to-drain. What is the name of this critical voltage and its symbol? If the gate-to-source voltage is below this level, the transistor is said to be in what mode?

Check back soon!
02:18

Problem 11

a) What are the three important regions of operation (or modes) of the output curves for a MOSFET? b) Sketch a hypothetical set of output curves for an $n$-channel enhancementmode MOSFET with a threshold voltage of $1.5 \mathrm{~V}$ and a current of $6 \mathrm{~mA}$ in the active region when $\mathrm{V}_{\mathrm{GS}}$ is $4 \mathrm{~V}$.

Chai Santi
Chai Santi
Numerade Educator

Problem 12

Determine the values of the parameter $K$ and $V_T$ for the MOSFET characteristics plotted in Figure P11.12.
Figure P11.12 can't copy

Check back soon!
01:30

Problem 13

The threshold voltage of an $n$-channel enhancement mode MOSFET is $0.8 \mathrm{~V}$. The MOSFET conducts a current of $2 \mathrm{~mA}$ with a $V_{G S}=2 \mathrm{~V}$ and $V_{D S}=5 \mathrm{~V}$. What is the drain current when $V_{G S}$ is doubled?

Chai Santi
Chai Santi
Numerade Educator
01:26

Problem 14

The drain currents of an $n$-channel MOSFET biased in the saturated (active) region for two values of $V_{G S}$ are given in Table P11.14. Plot the square root of $I_D$ versus $V_{G S}$ to obtain the threshold voltage and parameter $K$ for the transistor.
Table P11.14 can't copy

Chai Santi
Chai Santi
Numerade Educator
01:30

Problem 15

A particular $n$-channel MOSFET has $V_T=0.4 \mathrm{~V}$ and conducts in the active region a current of $2.5 \mathrm{~mA}$ when $V_{G S}=3 \mathrm{~V}$.
(a) What is the value of $\mathrm{K}$ ?
(b) What current does this same device conduct when $V_{D S}=1 \mathrm{~V}$ ?

Chai Santi
Chai Santi
Numerade Educator

Problem 16

From the transistor output curves and the load line for an inverter plotted in Figure P11.16, determine the values of $V_{D D}$ and $R_L$.
Figure P11.16 can't copy

Check back soon!
02:18

Problem 17

(a) On the MOSFET output curve of Figure P11.16, sketch the curve of drain current, $I_D$, versus $V_D$ for the circuit shown in Figure P11.17(a). (b) What other two-terminal device has a $V-I$ characteristic that resembles a transistor connected this way? (c) In what region of operation is the transistor biased? (d) Repeat 11.17(a) for the circuit in Figure P11.17(b).
Figure P11.17 can't copy

Chai Santi
Chai Santi
Numerade Educator

Problem 18

Draw the appropriate load line on the output curves shown in Figure P11.16 if the inverter had a supply voltage, $V_{D D}$, of $3.5 \mathrm{~V}$ and a load resistance of $475 \Omega$.

Check back soon!

Problem 19

A simple inverter using an $n$-channel enhancement-mode MOSFET is shown in Figure P11.19(a). Use the transistor model shown in Figure P11.19(b) to obtain the transfer characteristics of this inverter, a plot of $V_o$ versus $V_i$.
Figure P11.19 can't copy

Check back soon!

Problem 20

A NOT gate is implemented using an $n$-channel enhancement-mode MOSFET as shown in Figure P11.20 with $V_{D D}=5 \mathrm{~V}, V_T=0.9 \mathrm{~V}$, and $R_L=1 \mathrm{k} \Omega$.
(a) If $V_{\text {in }}=5 \mathrm{~V}$, and $r_{o n}=100 \Omega$; calculate $V_{\text {oul }}$.
(b) Find $R_L$ if $V_{\text {out }}=0.1 \mathrm{~V}$.
Figure P11.20 can't copy

Check back soon!

Problem 21

For the NOT gate and transistor described in problem 11.20 (a), determine the value of $K$ required to make $r_{o n}=100 \Omega$.

Check back soon!

Problem 22

A NOT gate is modeled using an inverter similar to that shown in Figure P11.20. For $V_{\text {in }}=V_{D D}=5 \mathrm{~V}$ and $V_{\text {out }}=0.2 \mathrm{~V}$, determine the load resistance, $R_L$, and the $n$-channel ON source-to-drain resistance $\left(r_{o n}\right)$ if the power dissipated in the load resistance during $\mathrm{ON}$ state is $0.48 \mathrm{~mW}$.

Check back soon!
01:38

Problem 23

Sketch the cross-section and two common symbols for the $p$-channel enhancement-mode MOSFET.

David Collins
David Collins
Numerade Educator
02:57

Problem 24

The drain current of an $n$-channel depletionmode MOSFET is plotted as a function of the gate voltage in Figure P11.24. Obtain the value of the "pinch-off" voltage for the MOSFET.
Figure P11.24 can't copy

Chai Santi
Chai Santi
Numerade Educator

Problem 25

The $I_D-V_{D S}$ characteristics of a JFET are shown in Figure P11.25(a). Using the load line concept, compute the $Q$-point of the circuit in Figure $11.25(\mathrm{~b})$
Figure P11.25 can't copy

Check back soon!
01:38

Problem 26

Draw two schematic symbols each for the $n$-channel and p-channel depletion-mode MOSFET.

Ajay Singhal
Ajay Singhal
Numerade Educator
05:13

Problem 27

For switching applications, which device terminal is usually used as the control terminal for (a) MOSFETs? (b) BJTs?

Khoobchandra Agrawal
Khoobchandra Agrawal
Numerade Educator

Problem 28

The circuit of an $n$-channel enhancement-mode MOSFET amplifier is shown in Figure P11.28. (a) If we wish to establish $V_{G S}=2 \mathrm{~V}$, find $R_2$ if $R_1=150 \mathrm{k} \Omega$. (b) For this circuit would we expect $V_T$ to be more or less than $2 \mathrm{~V}$ ?
Figure P11.28 can't copy

Check back soon!

Problem 29

The output curves of an $n$-channel enhancement-mode MOSFET are shown in Figure P11.29. This transistor is placed in the common source amplifier in Figure P11.28 with $R_1=100 \mathrm{k} \Omega, R_2=30 \mathrm{k} \Omega$, and $R_D=$ $1.25 \mathrm{k} \Omega$. (a) Construct the load line for this circuit. (b) Obtain the quiescent operating point, that is, $Q$-point. (c) If $v_i$ is a sinusoidal signal of amplitude $1 \mathrm{~V}$,sketch the variation of the output voltage $v_o$ about the operating point. (d) Find the large-signal voltage gain. (e) Describe any possible distortion of the output signal. If we reduce the amplitude of the input signal, would there be less distortion?
Figure P11.29 can't copy

Check back soon!
02:59

Problem 30

Describe the function of the following in an amplifier circuit: (a) coupling capacitor, (b) bypass capacitor.

Anurag Kumar
Anurag Kumar
Numerade Educator
01:25

Problem 31

What is the difference between an ac load line and a dc load line? Under what conditions are the two identical?

Narayan Hari
Narayan Hari
Numerade Educator

Problem 32

The output curves of an $n$-channel MOSFET are shown in Figure P11.32(a). This transistor is placed in the circuit in Figure P11.32(b). (a) What mode device is this MOSFET? (b) If we wish to put the $Q$-point on the $V_{G S}=0.5 \mathrm{~V}$ curve, what value of $R_S$ should be selected? Hint: First compute $V_G$; then write an equation for $V_{G S}$ and use it to solve for $R_S$. (c) Construct the dc load line on the output curves. (d) Obtain the $Q$-point of the circuit. (e) Construct the ac load line. (f) Sketch the output voltage for a triangular input voltage of $1 \mathrm{~V}$ peak-to-peak. (g) Find the large-signal voltage gain.
Figure P11.32 can't copy

Check back soon!

Problem 33

Figure P11.33 shows a common source amplifier circuit using an $n$-channel depletion-mode MOSFET in a self-biasing configuration. (a) Why is this configuration self-biasing? If $I_D$ is measured to be $1.2 \mathrm{~mA}$, determine $V_{G S}$. (b) Calculate the slope of the dc load line. (c) Calculate the slope of the ac load line.
Figure P11.33 can't copy

Check back soon!

Problem 34

Figure P11.34 shows a common gate amplifier configuration using an $n$-channel depletionmode transistor. The $Q$-point for this circuit is chosen to be $I_D=5 \mathrm{~mA}, V_{D S}=5 \mathrm{~V}$, and $V_{G S}=-2 \mathrm{~V}$. (a) Calculate the values of resistances $R_S$ and $R_D$. (b) What is the slope of the dc load line? (c) What is the slope of the ac load line?
Figure P11.34 can't copy

Check back soon!

Problem 35

The circuit for a common drain amplifier is shown in Figure P11.35 with $R_S=750 \Omega$ and $R_G=2 \mathrm{M} \Omega$. If the $Q$-point is chosen to be $I_D=2 \mathrm{~mA}$, find $V_{G S}$.
Figure P11.35 can't copy

Check back soon!

Problem 36

a) What does BJT stand for? b) What are the two basic types of BJTs?

Check back soon!
00:50

Problem 37

The direction of the arrow in the symbol for the PNP and NPN transistors has what significance?

Vinnu M
Vinnu M
Numerade Educator

Problem 38

Sketch the cross-section of a planar-processed PNP transistor clearly showing the three terminals of the B.JT.

Check back soon!
00:48

Problem 39

Indicate the direction of positive current (net positive charge movement) in or out of each terminal of the transistors in Figure P11.39 assuming that both the transistors are biased in the active region of operation.
Figure P11.39 can't copy

Manish Kumar
Manish Kumar
Numerade Educator
01:54

Problem 40

Figures P11.40 (a-f) illustrate NPN and PNP BJTs with biased junctions. For each case identify each of the junctions as forward or reverse biased. Also identify the mode of operation of the BJT, that is, cutoff, saturation, active, or reverse-active, and redraw each circuit with the proper transistor symbol.
Figure P11.40 can't copy

Chai Santi
Chai Santi
Numerade Educator

Problem 41

The NPN transistor in Figure P11.41 has $\beta_F=100$ and the emitter junction is forward biased at $V_{B E}=0.6 \mathrm{~V}$.
(a) What is the mode of operation of the transistor?
(b) Calculate the base, emitter, and collector currents.
Figure P11.41 can't copy

Check back soon!

Problem 42

Figure P11.42 (a) shows a BJT common emitter amplifier circuit; Figure P11.42 (b) shows the output curves for the transistor. Assuming $V_{B E}=0.7 \mathrm{~V}$, (a) draw the dc load line. (b) Determine the $Q$-point. (c) At the $Q$-point, what is the value of $V_{C E}$ and $I_C$ ? (d) Determine the transistor's $\beta$.
Figure P11.42 can't copy

Check back soon!
02:06

Problem 43

The values for $\alpha_F$ are measured for three transistors as $\alpha_F=0.97, \alpha_F=0.98$, and $\alpha_F=0.99$. Calculate the corresponding values of $\beta_F$ for each.

Chai Santi
Chai Santi
Numerade Educator
01:56

Problem 44

The PNP transistor in the circuit shown in Figure P11.44 has the following characteristics: $\beta_F=75$, and assume $V_{C E(S A T)}=-0.1 \mathrm{~V}$. (a) What value of collector current flows when the transistor is saturated? (b) If $V_{B E}=-0.6 \mathrm{~V}$, what value of $V_1$ is required to saturate the transistor?
Figure P11.44 can't copy

Chai Santi
Chai Santi
Numerade Educator
03:01

Problem 45

Figure P11.45 shows an NPN transistor connected in a way that it looks like a diode from the terminals the transistor is operating in the active region. Given $V_{B E}=0.7 \mathrm{~V}$ and $\beta_F=60$, calculate the base and collector currents.
Figure P11.45 can't copy

Chai Santi
Chai Santi
Numerade Educator

Problem 46

For the circuit given in Figure P11.46, assuming $\beta_F=100$ and $V_{B E}=0.7 \mathrm{~V}$, (a) find $V_o$ for $V_i=0.8,1.5,2.0$, and $2.5 \mathrm{~V}$. (b) At approximately what value of $V_i$ will the collector current be determined by the circuit bias conditions rather than the $\beta_F$ relationship? What mode of operation is this? (c) For $V_i=2.5 \mathrm{~V}$, what is the forced beta, $\beta_F^*$ ?
Figure P11.46 can't copy

Check back soon!
07:03

Problem 47

Repeat problem 11.42
(a) with $R_C=1 \mathrm{k} \Omega$
(b) with $R_C=2 \mathrm{k} \Omega$

Meghan Miholics
Meghan Miholics
Numerade Educator
00:39

Problem 48

Figure P11.48 shows a BJT common emitter circuit and curves. The $Q$-point is chosen to be $I_C=30 \mathrm{~mA}$ and $V_{C E}=5 \mathrm{~V}$; assume $V_{B E}=0.7 \mathrm{~V}$. (a) Draw the dc load line. (b) Calculate the value of $R_C$. (c) Calculate the value of $R_B$. (d) Calculate the value of transistor's $\beta$. (e) If $v_s(t)$ is sinusoidal with an amplitude of $2.5 \mathrm{~V}$, show on the load line the range of movement of the bias point, and sketch a plot of $v_{C E}(t)$. (f) $\mathrm{Cal}-$ culate the value of the large-signal voltage gain.
Figure P11.48 can't copy

Chai Santi
Chai Santi
Numerade Educator
01:55

Problem 49

In Figure P11.49, determine $I_C$ and $V_C$ for the following values of $I_B$ and designate the mode of transistor operation.(a) $I_B=0$, (b) $I_B=20 \mu \mathrm{A}$, (c) $I_B=60 \mu \mathrm{A}$, (d) $I_B=100 \mu \mathrm{A}$.
Figure P11.49 can't copy

Chai Santi
Chai Santi
Numerade Educator

Problem 50

In the circuit shown in Figure P11.50, assume the base emitter turn-on voltage, $V_{B E}$, is $0.7 \mathrm{~V}$, $V_{C E(S A T)}$ is $0.1 \mathrm{~V}$, and $\beta_F$ is 200 . Obtain the value of the output voltage for $V_i=0.5 \mathrm{~V}, 0.8 \mathrm{~V}, 1.0 \mathrm{~V}$, and $3.5 \mathrm{~V}$.
Figure P11.50 can't copy

Check back soon!
01:42

Problem 51

A transistor with output curves, shown in Figure P11.51, is used in the circuit in Figure P11.50. Use a graphical approach (plot the load line) to find the value of $V_o$ if $V_i=1.1 \mathrm{~V}$.
Figure P11.51 can't copy

Khoobchandra Agrawal
Khoobchandra Agrawal
Numerade Educator

Problem 52

Figure P11.52 shows a BJT common emitter selfbias circuit. Assuming $I_B \ll I_1, \beta=200$, and $V_{B E}=0.7 \mathrm{~V}$, (a) calculate the values of $I_E, I_C$, and $I_B$. (b) Calculate the value of $V_{C E}$. (c) If $v_i$ is increased by $0.1 \mathrm{~V}$, what's the effect on $v_o$ ?
Figure P11.52 can't copy

Check back soon!

Problem 53

Assume that the circuit of Figure P11.53 utilizes the transistor characterized by the output curves in Figure P11.51(b). $V_{B E}=0.7 \mathrm{~V}$. (a) Draw the dc load line. (b) Find the Q-point and draw the ac load line. (c) Estimate the voltage gain by determining how a small change in $v_i$ changes the collector current, and track this change on the ac load line.
Figure P11.53 can't copy

Check back soon!

Problem 54

Figure P11.54 shows a BJT common emitter self-bias amplifier circuit with a PNP transistor. Assuming $V_{B E}=-0.7 \mathrm{~V}$ and $\beta=120$, (a) find the value for $R_1$ that makes $I_E=-1.2 \mathrm{~mA}$. (b) Find the value for $R_C$ that will make $V_C=-6 \mathrm{~V}$. (c) Determine the slope of the dc load line. (d) Where would we place a bypass capacitor in this circuit, and why?
Figure P11.54 can't copy

Check back soon!

Problem 55

Given the common base BJT bias circuit shown in Figure P11.55, let us calculate the location of the $Q$-point, assuming $\beta$ is large, if
$$
\begin{array}{ll}
R_1=6 \mathrm{k} \Omega & R_C=4.5 \mathrm{k} \Omega \\
R_2=1 \mathrm{k} \Omega & R_E=1.5 \mathrm{k} \Omega
\end{array}
$$

Note that this is exactly the same dc circuit as that previously discussed in the common emitter circuit configuration.
Figure P11.55 can't copy

Check back soon!

Problem 56

Calculate the dc value of $I_C$ for the common collector amplifier in Figure P11.56 assuming the following values:
$$
\begin{aligned}
& R_1=4 \mathrm{k} \Omega \\
& R_2=2 \mathrm{k} \Omega \quad R_E=1.0 \mathrm{k} \Omega
\end{aligned}
$$
Figure P11.56 can't copy

Check back soon!
01:18

Problem 57

List the factors that impose limits on a MOSFET's region of safe operation. How would you expect each of these to be related to the physical size or structure of the MOSFET?

Chai Santi
Chai Santi
Numerade Educator

Problem 58

Plot the constant power contour for $1 \mathrm{~mW}$ and $4 \mathrm{~mW}$ on the MOSFET output curves in Figure P11.32(a).

Check back soon!
01:13

Problem 59

(a) On the transistor output curves shown in Figure P11.42(b), plot three constant power contours: $4 \mathrm{~mW}, 10 \mathrm{~mW}$, and $30 \mathrm{~mW}$. (b) If we wish to limit the power dissipated in this device to $10 \mathrm{~mW}$, draw an acceptable load line that would give large swings in $V_{C E}$. (c) If we wished to obtain large output current swings, would you design a different load line?

Chai Santi
Chai Santi
Numerade Educator

Problem 60

Draw a constant power curve for $P=200 \mathrm{~mW}$ on the output curves for the transistor shown in Figure P11.48(b). If this is the maximum specified value for power dissipation, is the $Q$-point selected in problem 11.48 acceptable?

Check back soon!

Problem 61

A thyristor with $V_{B O}=5 \mathrm{~V}$ and $I_H=10 \mathrm{~mA}$ is placed in the circuit in Figure P11.61(a). The voltage source $v_1(t)$ ramps up to 10 volts over 10 seconds and back down again, as shown in Figure 11.61(b). Plot the current $i(t)$ over the same 20 seconds.
Figure P11.61 can't copy

Check back soon!
05:17

Problem 62

The circuit shown in Figure P11.62 can be used as a timer circuit. Switch $S_1$ is closed at $t=0$ and the capacitor is initially uncharged; at time $t_1$ the thyristor will fire and turn on the small indicator light, which has a resistance of $100 \Omega$. The thyristor has $V_{B O}=20 \mathrm{~V}$ and $I_H=30 \mathrm{~mA}$. Find time $t_1$.
Figure P11.62 can't copy

Meghan Miholics
Meghan Miholics
Numerade Educator

Problem 63

For the SCR motor speed controller shown in Figure 11.57, sketch the waveforms for the gate current and the motor current as a function of time for firing angles of $30^{\circ}$ and $160^{\circ}$.

Check back soon!
02:55

Problem 64

Figure P11.64 is a circuit in which switch $S_1$ is used in the normal mode of operation to control $Q_1$, which switches a large current in load $R_L$. If there is an accidental short across the load (simulated by closing $S_2$ ), the increased current in $Q_1$ and $R_{\text {sense }}$ causes the SCR to fire, and this lowers the base voltage of $Q_1$, turning it off. Assume the SCR fires at $V_G=0.7 \mathrm{~V}, V_{B E}=0.7 \mathrm{~V}$, and $\beta=500$. (a) Determine the normal current through $R_L$ (and $Q_1$ ) when $S_1$ closes. (b) If there is a short across $R_L$, at what load current will the circuit "shut down" (turn off) $Q_1$ ? (c) What must be done to reactivate the circuit?
Figure P11.64 can't copy

Averell Hause
Averell Hause
Carnegie Mellon University