For the folded-cascode amplifier shown in Fig. $6.20$, with the transistor sizes given in Table $6.1$, estimate the approximate frequency of the second pole caused by the parasitic capacitances at the drains of $Q_{1}$ and $Q_{2}$. Assume a $1.8-\mathrm{V}$ power supply is used, and the total supply current is $0.4 \mathrm{~mA}$ as in Example 6.9. To simplify matters, junction capacitances can be ignored. What should $\mathrm{C}_{\mathrm{L}}$ be to achieve $70^{\circ}$ phase margin? What would the corresponding unity-gain frequency and slew rate be?