Sketch the low and high-frequency behavior (and explain the difference) of an MOS capacitor with a high-k gate dielectric $\left(\epsilon_{r}=25\right)$ on an $\mathrm{n}$ -type semiconductor $\left(\epsilon_{r}=10, \mathrm{n}_{1}=10^{13} \mathrm{~cm}^{-3}\right)$. Mark off the accumulation, depletion, inversion regions, and the approximate location of the flat band and threshold voltages. If the high-frequency capacitance is $250 \mathrm{nF} / \mathrm{cm}^{2}$ in accumulation and $50 \mathrm{nF} / \mathrm{cm}^{2}$ in inversion, calculate the dielectric thickness and the depletion width in inversion.