The following MIPS Code is executed using the single cycle MIPS architecture.
Start:
addiu $t9, $0, 230
addi $t8, $0, 4
add $s1, $s0, $t8
Loop:
slt $t0, $s0, $s1
beq $t0, $0, Exit
lbu $t1, 0 ($s0)
sub $t1, $t1, $t9
sb $t1, 0 ($s0)
addi $s0, $s0, 1
j Loop
Exit:
Question 1: Data Path - For the given code, write the Functional Units used in order. (1 point)
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Specify if any Functional Units (FUs) are used in parallel for the same instruction, for
example PC+4 Adder is used in parallel to Instruction Memory.
For Multiplexors, if the output of the MUX is used, then it implies that the MUX is used
(i.e., if the select lines are 0 or 1 and not don't cares, then the MUX is used). Similarly, if
any FU output is unused, we assume that the FU is unused.
Instruction Memory (IM), Data Memory (DM), Register File (RF), Arithmetic and Logical Unit
(ALU), Program Counter Register (PC), Sign Extension block (SE), Control Unit (ctrl1), ALU control
unit (ctrl2), PC+4 Adder (add1), Branch PC target Adder (add2), Shift Left 2 (sII), Regdst MUX
(mux1), ALUSrc MUX (mux2), MemtoReg MUX (mux3), PCSrc MUX (mux4), Jump MUX (mux5).
(mux1), ALUSrc MUX (mux2), MemtoReg MUX (mux3), PCSrc MUX (mux4), Jump MUX (mux5).
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You may group the instructions with the same datapath.
You may use the following notations for the Functional Units.
