Q1. (80 points) Considering $(no + 17)_{10} = (abcdefg)_2$, design a synchronous sequence detector circuit that
detects 'abcdefg' from a one-bit serial input stream applied to the input of the circuit with each active clock
edge. The sequence detector should detect overlapping sequences.
a) Derive the state diagram, describe the meaning of each state clearly. Specify the type of the
sequential circuit (Mealy or Moore),
b) Determine the number of state variables to use and assign binary codes to the states in the state
diagram,
c) Choose the type of the FFs for the implementation. Give the complete state table of the sequence
detector, using reverse characteristics tables of the corresponding FFs
d) Obtain Boolean functions for state inputs. Also obtain the output Boolean expression,
e) Draw the corresponding logic circuit for the sequence detector.
f) Verify your design by providing Logisim simulation of the obtained circuit and show the
corresponding truth table in Logisim
Q2. (20 points) Assign 10#noh to 00(#no):0400h and #no h to 0040:00#no h write a program that store;
a) The sum of these two numbers in 00#no:0600h
b) The difference of these two numbers in 00#no:0602h
c) The product of these two numbers in 00#no:0604h
d) After the division of these two numbers, the quotient in 00#no:0608h and remainder is in
00#no:0610h
(Ex: for 122202099 / $(99)_{10} = (63)_{16}$, no=63 H)
NOTE: You have to add comment line to your code that explain your code.
