a.
Explain with the aid of a diagram the operation of a 4-bit successive-approximation Analog-To-Digital Converter (ADC). A particular successive-approximation ADC uses reference values of 16 V for bit 3, 8 V for bit 2, 4 V for bit 1, and 2 V for bit 0. Determine the sequence of binary states in the register for the conversion of a constant input of 7.7 V. Explain each step.
b.
The following Verilog code describes a certain logic gate at the switch-level.
module mygate(Y, A);
input A;
output Y;
supply1 POWER;
supply0 GROUND;
pmos t1 (Y, POWER, A);
nmos t2 (Y, GROUND, A);
endmodule
Draw a transistor-level circuit diagram for this logic gate. Produce a table indicating the state of each of the transistors for all possible combinations of the input A. Hence, deduce the logic function of the gate.
A 500 ohm resistive load is connected between the output of the gate (Y) and GROUND. The supply (POWER) is set to 1.8V and the input (A) is set to 0V.
Calculate the current flowing through the resistive load and the voltage at the output (Y) of the gate.
You may assume that the on resistance (Rps) of a pmos transistor is 75 ohms and that of an nmos transistor is 250 ohms. The off resistance for both transistors is 500,000 ohms.
