3. [25 pts. total] Given the following VHDL description snippet for pre-loading the VBC-1 instruction memory, mem.
type mem_type is array(0 to 15) of std_logic_vector(7 downto 0);
signal mem: mem_type := (
X"a0", X"10", X"77", X"08",
X"80", X"c0", X"f0", X"00",
X"00", X"00", X"00", X"00",
X"00", X"00", X"00", X"00");
a. Decode the assembly language program implied by the memory values [9 pts], and the register transfer outcomes [7 pts.] for the program statements.
d. Test the given program using Input="0110". Show the final status of the registers (including the instruction memory) by running the program to the last non-zero instruction. [9 pts.]