Error Coding
a) Become familiarized with the Altera Quartus Prime electronic circuit design software and model, using VHDL, a serial communications receiver (7/4 decoder), with error control, based on a linear sequential circuit with the transfer function (1 + D^2 + D^3)^(-1), as shown in figure below.
b) Develop the 7/4 decoder VHDL code into a 15/11 decoder with the characteristics (1 + D^3 + D^4)^(-1).
c) Develop the VHDL code for a 7/4 encoder with a characteristic function (1 + D^2 + D^3).
d) Develop the full 7/4 coding Linear Sequential System (LSS) (Transmitter and Receiver)
Transmit Encoder
Receive Decoder
... Input data
rxlss(3:1)
sipo(6:0)
6
sin
Error
assessor/correct
42ff control(6:0)
Transmission Line
dout(3:0) Output Data