Question

The circuit below shows a part of the implementation of the LC-3 architecture: 15 IR 0 Instruction Register 16 global bus A 19/14:0 (1 signal L for questions c), d) and e) signal K for question b) Circult element J for question a) a) (2 points) What is circuit element J? (as in multiplexer? adder?...) b) (3 points) Signal K is one of the inputs to circuit element J. Describe how it is generated (i.e. the digital logic), and what information it provides about the current value on the bus (i.e. what does it "mean"?) c) (2 points) Signal L is the other input to circuit element J. Study the LC-3 overall schematic on page 6 of this exam: Signal L is shown in the schematic; what is it called there? d) (3 points) Give a brief high level description of the "meaning" of signal L (i.e. WITHOUT referring to gates!) L is 1 if... e) (5 points) From your understanding of this whole component of the LC-3 architecture, it should be clear that there is an error in the depicted generation of signal L. Identify the errorand explain why it is wrong and how to fix it.

          The circuit below shows a part of the implementation of the LC-3 architecture:
15
IR
0
Instruction Register
16 global bus
A
19/14:0
(1
signal L for questions c), d) and e)
signal K for question b)
Circult element J for question a)
a) (2 points) What is circuit element J? (as in multiplexer? adder?...)
b) (3 points) Signal K is one of the inputs to circuit element J.
Describe how it is generated (i.e. the digital logic), and what information it provides about the current value on the bus
(i.e. what does it "mean"?)
c) (2 points) Signal L is the other input to circuit element J.
Study the LC-3 overall schematic on page 6 of this exam: Signal L is shown in the schematic; what is it called there?
d) (3 points) Give a brief high level description of the "meaning" of signal L (i.e. WITHOUT referring to gates!)
L is 1 if...
e) (5 points) From your understanding of this whole component of the LC-3 architecture, it should be clear that there is an
error in the depicted generation of signal L.
Identify the errorand explain why it is wrong and how to fix it.

The circuit below shows a part of the implementation of the LC-3 architecture:
15
IR
0
Instruction Register
16 global bus
A
19/14:0
(1
signal L for questions c), d) and e)
signal K for question b)
Circult element J for question a)
a) (2 points) What is circuit element J? (as in multiplexer? adder?...)
b) (3 points) Signal K is one of the inputs to circuit element J.
Describe how it is generated (i.e. the digital logic), and what information it provides about the current value on the bus
(i.e. what does it "mean"?)
c) (2 points) Signal L is the other input to circuit element J.
Study the LC-3 overall schematic on page 6 of this exam: Signal L is shown in the schematic; what is it called there?
d) (3 points) Give a brief high level description of the "meaning" of signal L (i.e. WITHOUT referring to gates!)
L is 1 if...
e) (5 points) From your understanding of this whole component of the LC-3 architecture, it should be clear that there is an
error in the depicted generation of signal L.
Identify the errorand explain why it is wrong and how to fix it.

Added by Sara J.

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