Texts: 1. Consider the circuit below, implement the Verilog code using the gate-level and user-defined level primitive design. Provide the code and screenshot the wave diagrams for input and output. (Hint: you have to use modules of 4_Adder_Subtractor, Full Adder, and Half Adder modules).
4-bit adder-subtractor:
B
A
B A2
C.
C,
FA
FA
FA
FA
S3
So