Chapter Questions
If $A=0111, B=1010, C=0101$, and $D=1011$, find(a) $A+B$(b) $C+D$
Given the data in problem 13.1 , find(a) $A+C$(b) $B+D$
Using the data in problem 13.1 , find(a) $B+C$(b) $A+D$
If $A=111, B=011, C=110$, and $D=010$, find(a) $A \times D$(b) $C \times D$
Given the data in problem 13.4 , find(a) $B \times D$(b) $B \times C$
Using the data in problem 13.4, determine(a) $A \times C$(b) $A \times B$
Given the data in problem 13.1 , find(a) $A \times B$(b) $C \times D$
Using the data in problem 13.1, compute(a) $A \times C$(b) $B \times D$
Using the data in problem 13.1 , find(a) $B \times C$(b) $A \times D$
Convert the following numbers in base 2 to base 10 :(a) 1100(b) 10101(c) 1010(d) 11111111
Convert the following numbers in binary to decimal:(a) 1111(b) 10010(c) 100001(d) 101011
Convert the following numbers from base 2 to base 10:(a) 101010(b) 110111(c) 11101(d) 1110001111
Convert the following numbers in binary to decimal:(a) 1100011(b) 110110111(c) 10000001(d) 11111000000
Convert the following numbers from decimal to binary:(a) 7(b) 13(c) 15(d) 27
Convert the following numbers from base 10 to base 2 :(a) 19(b) 25(c) 33(d) 72
Convert the following numbers from decimal to binary:(a) 48(b) 57(c) 99(d) 100
Convert the following numbers from base 10 to base 2 :(a) 101(b) 172(c) 210(d) 255
Use the Boolean postulates and theorems to simplify the following expressions:(a) $\mathrm{f}(A, B, C)=\bar{A} \bar{B}+\bar{B} C+A \bar{B}$(b) $\mathrm{f}(A, B, C)=\bar{A} B \bar{C}+A B D+\bar{A} B C$
Compute the truth table for the following functions:(a) $\mathrm{f}(A, B, C)=B \bar{C}+\bar{B} C$(b) $\mathrm{f}(A, B, C)=\bar{B}+C$
Compute the truth table for the following functions:(a) $\mathrm{f}(A, B, C)=\bar{A} \bar{B}+C$(b) $\mathrm{f}(A, B, C)=\bar{A} \bar{B}+\bar{B} C+A \bar{B}$
Use a Venn diagram, show that $\mathrm{f}(A, B, C)=$ $\Sigma m(1,2,5,6)=B \bar{C}+\bar{B} C$
Using a Venn diagram, show that $\mathrm{f}(A, B$, $C)=\Sigma m(0,1,3,4,5,7)=C+\bar{B}$
Use a Venn diagram to demonstrate that $\mathrm{f}(A$, $B, C)=B C+\bar{A} \bar{B}+A \bar{B} C=C+\bar{A} B$
Find the minimum form for the Boolean functions(a) $\mathrm{f}(A, B, C)=\Sigma m(0,1,3,4,5,7)$(b) $\mathrm{f}(A, B, C)=\Sigma m(1,2,5,6)$
Find the minimum form for the Boolean functions(a) $\mathrm{f}(A, B, C)=\Sigma m(1,2,5,7)$(b) $\mathrm{f}(A, B, C)=\Sigma m(0,1,3,6,7)$
Expand the following function into a set of minterms and then use the K-map to find a minimum SOP form.$$\mathrm{f}(A, B, C)=\bar{A} \bar{B}+\bar{B} C+A \bar{B}$$
Expand the following function into a set of minterms and then use the K-map to find the minimum SOP realization.$$\mathrm{f}(A, B, C)=B C+\bar{A} \bar{B}+A \bar{B} C$$
Expand the following function into a set of minterms and then use the K-map to find the minimum SOP realization.$$\mathrm{f}(A, B, C, D)=\bar{A} B \bar{C}+A B D+\bar{A} B C$$
Expand the following function into a set of minterms and then use the K-map to find the minimum SOP realization.$$\mathrm{f}(A, B, C, D)=\bar{A} \bar{B} D+\bar{A} B \bar{C} D+A B \bar{C}+A \bar{B} D$$
Expand the following function into a set of minterms and then use the K-map to find the minimum SOP realization.$$\begin{aligned}& \mathrm{f}(A, B, C, D)=\bar{B} \bar{C} D+ \\& \bar{A} B \bar{C} D+A \bar{C} D+\bar{B} C D+B C D\end{aligned}$$
Find a minimum SOP form for the switching functions(a) $\mathrm{f}(A, B, C, D)=\Sigma m(1,4,7,9,12,15)$(b) $\mathrm{f}(A, B, C, D)=\Sigma m(4,6,7,12,14,15)$
Find the minimum SOP form for the switching functions(a) $\mathrm{f}(A, B, C, D)=\Sigma m(2,3,11,13,14,15)$(b) $\mathrm{f}(A, B, C, D)=\Sigma m(0,2,3,7,9,13)$
Find the minimum SOP form for the switching functions(a) $\mathrm{f}(A, B, C, D)=\Sigma m(0,2,4,10,12,14)$(b) $\mathrm{f}(A, B, C, D)=\Sigma m(3,4,6,7,11,12,13,15)$
Find the minimum SOP form for the switching functions(a) $\mathrm{f}(A, B, C, D)=\Sigma m(1,4,5,7,9,15)$(b) $\mathrm{f}(A, B, C, D)=\Sigma m(0,2,5,7,8,10,13,15)$
Design a logic circuit with a $B C D$ input that detects all numbers that are greater than or equal to 7.
Design a logic circuit with a $B C D$ input that detects the decimal numbers 3,4 , and 5 .
In the network in Figure P13.37, circuit $A$ inputs certain bit patterns to circuit $B$. A bit pattern containing exactly two 1's is an error and should trigger the alarm circuit. Design an alarm circuit that produces a 1 if exactly two 1's appear in the input bit pattern to circuit B.Figure P13.37 can't copy
A half adder circuit has two input bits, $a_i$ and $b_i$. The output is a sum bit, $s_i$, and a carry bit, $c_{i+1}$. Derive the logic equations for the sum and carry bits that are necessary for designing a half adder circuit.
The 4221 code is a weighted code in which the four bit positions are assigned the weights (4221). The code is listed below.$$\begin{array}{ll}0-0000 & 5-0111 \\1-0001 & 6-1100 \\2-0010 & 7-1101 \\3-0011 & 8-1110 \\4-1000 & 9-1111\end{array}$$
Design a BCD to 4221 code converter.
Design a logic circuit with three inputs $A, B$, and $C$, such that the output will be high when at least two of the inputs are high.
Design a logic circuit with four inputs $A, B, C$, and $D$, such that the output will be high only when an even number of the inputs, greater than zero, are high.
A logic circuit has four input lines, $A, B, C$, and $D ; A$ represents the MSB and $D$ represents the LSB. Design a logic circuit in such a way that the output is high if the input signal is outside the midrange of the input numbers, that is, in the range $(0)_{10}$ to $(3)_{10}$ or $(12)_{10}$ to $(15)_{10}$.
Three sensors are strategically placed along a production line. The sensor outputs are low if all measurements are in the normal range. Measurements outside the normal range produce a high output. The sensors are used to trigger an alarm if any two of the measurements are simultaneously high. Design a logic circuit that will produce a high signal for the alarm.
A tank of fluid employed in a chemical process is being monitored with three sensors. The sensors measure temperature, pressure, and fluid level. If all the sensor measurements are in the normal range, the sensor outputs are low. If the measurements are outside the normal range, the sensor outputs are high. Design a logic circuit that will produce a high signal for an alarm under the following conditions:$\bullet$ pressure and temperature are too high$\bullet$ fluid level is too high and either pressure or temperature or both are too high
An industrial plant has two reservoirs that are used to temporarily store fluid $A$ and fluid $B$. Each reservoir is equipped with two sensors: one detects the incoming flow rate and the other detects the fluid level. Assume the flow rate sensor outputs are low when the flow rate is satisfactory and high when the flow rate is too high. In addition, assume the fluid level sensor outputs are low when the fluid level is satisfactory and high when the level is too high. Design a detector circuit that will produce a high output whenever the fluid level in either or both reservoirs is too high and the flow rate for either of both reservoirs is too high.
A circuit that displays voting results is required. There are three voters who can vote yea or nay. The circuit output should be high if the majority of the votes are yea. Produce the smallest possible circuit.
A circuit is needed that identifies prime numbers between 0 and 9 . The input to the circuit is in BCD format. The output is low if the input is prime. Draw the minimum possible circuit.
Unfortunately, Alice, Bob, and Carol own a .com company. They have decided to hire David, a shrewd business major, to guide them through these perilous business times. However, they must decide whether to offer David significant stock options or just compensation. Each person votes STOCKS or CASH. Draw a truth table for this voting scenario where votes and the resulting decision are encoded in ones and zeros. Create your own code scheme.
Compute the state table for the synchronous sequential circuit shown in Figure P13.49.Figure P13.49 can't copy
Compute the state table for the synchronous sequential circuit shown in Figure P13.50.Figure P13.50 can't copy
Determine the state table for the synchronous sequential circuit shown in Figure P13.51.Figure P13.51 can't copy
Determine the state table for the synchronous sequential circuit shown in Figure P13.52.Figure P13.52 can't copy
Compute the state table for the synchronous sequential circuit shown in Figure P13.53.Figure P13.53 can't copy
Compute the state table for the synchronous sequential circuit shown in Figure P13.54.Figure P13.54 can't copy
Find the logic equations for a $J-K$ flip-flop realization of the state table in Figure P13.55 using the state assignment $A=00, B=01$, $C=11$, and $D=10$.Figure P13.55 can't copy
Find the logic equations for a $J-K$ flip-flop realization of the state table in Figure P13.56 using the state assignment $A=00, B=01$, $C=11$, and $D=10$.Figure P13.56 can't copy
Determine the state diagram for a synchronous sequential circuit that has a single input and single output that will recognize the input string 0000 with overlap, that is, if$$\begin{aligned}& x=0000010000 \\& z=0001100001\end{aligned}$$
Determine the state diagram for a synchronous sequential circuit that has a single input and single output that will recognize the input string 0110 with overlap, that is, if$$\begin{aligned}& x=101101100 \\& z=000010010\end{aligned}$$
Determine the state diagram for the synchronous sequential circuit that has a single input and a single output that will recognize the input string 1001 with overlap, that is, if$$\begin{aligned}& x=10100100100 \\& z=00000100100\end{aligned}$$
Determine the state diagram for the synchronous sequential circuit that has a single input and single output that will recognize the input string of exactly one 1 followed by two 0s.
A PC's serial port transfers data in byte-size units. Typically, several additional bits are exchanged between transmitter and receiver to coordinate the transfer. This is called handshaking. A part of handshaking is a short bit sequence called the stop bits, which immediately follow the data byte. In a particular serial communication protocol the stop bits are the four-bit sequence 1111. This sequence does not occur elsewhere in the transmission. Using $\mathrm{J}-\mathrm{K}$ flip-flops, design a detection circuit that will recognize the stop bits sequence. The output, STOP, is high when the sequence is detected.
Design a serial adder where inputs $A$ and B arrive least significant bit first. Call the output $\Sigma$. Draw the circuit using J-K flipflops.
Design a serial subtractor where inputs $A$ and $B$ arrive least significant bit first. Call the output $\Delta$. Draw the circuit using $J-K$ flipflops.
Design a serial comparator that compares two inputs $X$ and $Y$, which arrive LSB first. There are three outputs: L, G, and E. L is high if $\mathrm{X}<\mathrm{Y}, \mathrm{G}$ is high if $\mathrm{X}>\mathrm{Y}$, and $\mathrm{E}$ is high if $\mathrm{X}=\mathrm{Y}$.
Draw a state diagram for a serial circuit that performs the mathematical operation $\mathrm{Z}=2 \mathrm{X}-\mathrm{Y}$ where $\mathrm{X}$ and $\mathrm{Y}$ are serial inputs arriving least significant bit first and $\mathrm{Z}$ is the result exiting the circuit least significant bit first.