Part II Fill in the dots
8. State two of the most significant drawbacks of pseudo-nMOS circuits:
(a)
(b)
9. Dynamic circuits utilize two phases for the system clock; the first phase is known as _______________ in
which the output is pre-charged to high-state, whereas the second phase is known as _______________
where the only allowable transition for the input is _______________ to _______________ transition, while for the
output the only allowable transition is the _______________ to _______________ transition.
Therefore, to cascade two stages of dynamic circuits, we must insert a _______________ stage in between.
10. Figure 2 indicates three mechanisms for static power dissipation in a typical MOS transistor and identifies
them with the letters, A, B and C. State, in the following spaces, what mechanism each letter stands for.
A stands for:
B stands for:
C stands for:
Gate
Source
Drain
B
C
Substrate
Figure 2
